| Message ID | 1335269116-9578-2-git-send-email-hdoyu@nvidia.com |
|---|---|
| State | Superseded, archived |
| Headers | show |
Hi, On Tue, Apr 24, 2012 at 03:05:15PM +0300, Hiroshi DOYU wrote: > @@ -95,6 +98,21 @@ static inline void gizmo_writel(unsigned long value, unsigned long offset) > writel(value, tegra_ahb->regs + offset); > } > > +#ifdef CONFIG_ARCH_TEGRA_3x_SOC > + > +void tegra_ahb_enable_smmu(void) > +{ > + unsigned long val; > + > + val = gizmo_readl(AHB_ARBITRATION_XBAR_CTRL); > + val |= AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE_DONE << > + AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE_SHIFT; > + gizmo_writel(val, AHB_ARBITRATION_XBAR_CTRL); > +} > +EXPORT_SYMBOL(tegra_ahb_enable_smmu); ok, so this is the only place where you need that global pointer. Who would call this ? Can you do runtime detection of the SoC and enable SMMU based on that ? I mean, will this function always be called for TEGRA 3 SoCs or is there another condition to that ?
On Tue, Apr 24, 2012 at 02:39:30PM +0200, Hiroshi Doyu wrote: > From: Felipe Balbi <balbi@ti.com> > Subject: Re: [PATCH v2 2/3] ARM: tegra: Add SMMU enabler in AHB > Date: Tue, 24 Apr 2012 14:32:52 +0200 > Message-ID: <20120424123248.GG8444@arwen.pp.htv.fi> > > > * PGP Signed by an unknown key > > > > Hi, > > > > On Tue, Apr 24, 2012 at 03:05:15PM +0300, Hiroshi DOYU wrote: > > > @@ -95,6 +98,21 @@ static inline void gizmo_writel(unsigned long value, unsigned long offset) > > > writel(value, tegra_ahb->regs + offset); > > > } > > > > > > +#ifdef CONFIG_ARCH_TEGRA_3x_SOC > > > + > > > +void tegra_ahb_enable_smmu(void) > > > +{ > > > + unsigned long val; > > > + > > > + val = gizmo_readl(AHB_ARBITRATION_XBAR_CTRL); > > > + val |= AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE_DONE << > > > + AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE_SHIFT; > > > + gizmo_writel(val, AHB_ARBITRATION_XBAR_CTRL); > > > +} > > > +EXPORT_SYMBOL(tegra_ahb_enable_smmu); > > > > ok, so this is the only place where you need that global pointer. Who > > would call this ? Can you do runtime detection of the SoC and enable > > SMMU based on that ? > > > > I mean, will this function always be called for TEGRA 3 SoCs or is there > > another condition to that ? > > Only Tegra3 has SMMU. but all of them ? In that case, you could call this from probe itself, right ? But an ifdef won't work in all cases, so you need to do runtime detection based on some revision register or cpu detection...
From: Felipe Balbi <balbi@ti.com> Subject: Re: [PATCH v2 2/3] ARM: tegra: Add SMMU enabler in AHB Date: Tue, 24 Apr 2012 14:41:18 +0200 Message-ID: <20120424124115.GL8444@arwen.pp.htv.fi> > * PGP Signed by an unknown key > > On Tue, Apr 24, 2012 at 02:39:30PM +0200, Hiroshi Doyu wrote: > > From: Felipe Balbi <balbi@ti.com> > > Subject: Re: [PATCH v2 2/3] ARM: tegra: Add SMMU enabler in AHB > > Date: Tue, 24 Apr 2012 14:32:52 +0200 > > Message-ID: <20120424123248.GG8444@arwen.pp.htv.fi> > > > > > > Old Signed by an unknown key > > > > > > Hi, > > > > > > On Tue, Apr 24, 2012 at 03:05:15PM +0300, Hiroshi DOYU wrote: > > > > @@ -95,6 +98,21 @@ static inline void gizmo_writel(unsigned long value, unsigned long offset) > > > > writel(value, tegra_ahb->regs + offset); > > > > } > > > > > > > > +#ifdef CONFIG_ARCH_TEGRA_3x_SOC > > > > + > > > > +void tegra_ahb_enable_smmu(void) > > > > +{ > > > > + unsigned long val; > > > > + > > > > + val = gizmo_readl(AHB_ARBITRATION_XBAR_CTRL); > > > > + val |= AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE_DONE << > > > > + AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE_SHIFT; > > > > + gizmo_writel(val, AHB_ARBITRATION_XBAR_CTRL); > > > > +} > > > > +EXPORT_SYMBOL(tegra_ahb_enable_smmu); > > > > > > ok, so this is the only place where you need that global pointer. Who > > > would call this ? Can you do runtime detection of the SoC and enable > > > SMMU based on that ? > > > > > > I mean, will this function always be called for TEGRA 3 SoCs or is there > > > another condition to that ? > > > > Only Tegra3 has SMMU. > > but all of them ? In that case, you could call this from probe itself, > right ? But an ifdef won't work in all cases, so you need to do runtime > detection based on some revision register or cpu detection... So far we don't have so many variants, and presently TEGRA_3x_SOC always has a SMMU. If there were some variants of TEGRA_3x_SOC, where some might not have SMMU, then runtime detection would make sense there. Now it's something like TEGRA_3x_SOC == SMMU. -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, Apr 24, 2012 at 03:03:19PM +0200, Hiroshi Doyu wrote: > > > Only Tegra3 has SMMU. > > > > but all of them ? In that case, you could call this from probe itself, > > right ? But an ifdef won't work in all cases, so you need to do runtime > > detection based on some revision register or cpu detection... > > So far we don't have so many variants, and presently TEGRA_3x_SOC > always has a SMMU. If there were some variants of TEGRA_3x_SOC, where > some might not have SMMU, then runtime detection would make sense > there. Now it's something like TEGRA_3x_SOC == SMMU. the problem is when you have single kernel for TEGRA 2 and TEGRA 3. If you rely on ifdef, one of them won't work properly, right ? ;-)
On Tue, Apr 24, 2012 at 03:05:15PM +0300, Hiroshi DOYU wrote: > +#define AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE_DONE 1 > +#define AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE_SHIFT 17 > + > struct __tegra_ahb { > void __iomem *regs; > struct device *dev; > @@ -95,6 +98,21 @@ static inline void gizmo_writel(unsigned long value, unsigned long offset) > writel(value, tegra_ahb->regs + offset); > } > > +#ifdef CONFIG_ARCH_TEGRA_3x_SOC > + > +void tegra_ahb_enable_smmu(void) > +{ > + unsigned long val; > + > + val = gizmo_readl(AHB_ARBITRATION_XBAR_CTRL); > + val |= AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE_DONE << > + AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE_SHIFT; In addition to what Felipe said... Why do you need two constants where you have only one use point? What's wrong with having just a single definition which gives you the right bitmask? -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/mach-tegra/include/mach/tegra-ahb.h b/arch/arm/mach-tegra/include/mach/tegra-ahb.h new file mode 100644 index 0000000..51a5800 --- /dev/null +++ b/arch/arm/mach-tegra/include/mach/tegra-ahb.h @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __MACH_TEGRA_AHB_H__ +#define __MACH_TEGRA_AHB_H__ + +extern void tegra_ahb_enable_smmu(void); + +#endif /* __MACH_TEGRA_AHB_H__ */ diff --git a/arch/arm/mach-tegra/tegra-ahb.c b/arch/arm/mach-tegra/tegra-ahb.c index 71b5950..32794ef 100644 --- a/arch/arm/mach-tegra/tegra-ahb.c +++ b/arch/arm/mach-tegra/tegra-ahb.c @@ -78,6 +78,9 @@ #define AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID 0xf8 +#define AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE_DONE 1 +#define AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE_SHIFT 17 + struct __tegra_ahb { void __iomem *regs; struct device *dev; @@ -95,6 +98,21 @@ static inline void gizmo_writel(unsigned long value, unsigned long offset) writel(value, tegra_ahb->regs + offset); } +#ifdef CONFIG_ARCH_TEGRA_3x_SOC + +void tegra_ahb_enable_smmu(void) +{ + unsigned long val; + + val = gizmo_readl(AHB_ARBITRATION_XBAR_CTRL); + val |= AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE_DONE << + AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE_SHIFT; + gizmo_writel(val, AHB_ARBITRATION_XBAR_CTRL); +} +EXPORT_SYMBOL(tegra_ahb_enable_smmu); + +#endif + struct __ahb_gizmo { unsigned long offset; unsigned long data;
Add extern func, "tegra_ahb_enable_smmu()" to inform AHB that SMMU is ready. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Cc: Felipe Balbi <balbi@ti.com> --- arch/arm/mach-tegra/include/mach/tegra-ahb.h | 19 +++++++++++++++++++ arch/arm/mach-tegra/tegra-ahb.c | 18 ++++++++++++++++++ 2 files changed, 37 insertions(+), 0 deletions(-)