From patchwork Mon Apr 2 05:53:02 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alok Chauhan X-Patchwork-Id: 150073 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 222DDB6FDF for ; Mon, 2 Apr 2012 15:53:23 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752649Ab2DBFxV (ORCPT ); Mon, 2 Apr 2012 01:53:21 -0400 Received: from hqemgate03.nvidia.com ([216.228.121.140]:8912 "EHLO hqemgate03.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752840Ab2DBFxU (ORCPT ); Mon, 2 Apr 2012 01:53:20 -0400 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Sun, 01 Apr 2012 23:08:51 -0700 Received: from hqemhub03.nvidia.com ([172.17.108.22]) by hqnvupgp08.nvidia.com (PGP Universal service); Sun, 01 Apr 2012 22:53:20 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Sun, 01 Apr 2012 22:53:20 -0700 Received: from localhost.localdomain (172.20.144.16) by hqemhub03.nvidia.com (172.20.150.15) with Microsoft SMTP Server (TLS) id 8.3.245.1; Sun, 1 Apr 2012 22:53:19 -0700 From: Alok Chauhan To: , , , , , , , , , , , , CC: , Subject: [PATCH v2] i2c: tegra: Add delay before reset the controller Date: Mon, 2 Apr 2012 11:23:02 +0530 Message-ID: <1333345982-16595-1-git-send-email-alokc@nvidia.com> X-Mailer: git-send-email 1.7.4.1 X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org NACK interrupt generated before I2C controller generates the STOP condition on bus. In Software, because of this reset of controller is happening before I2C controller could complete STOP condition. So wait for some time before resetting the controller so that STOP condition has delivered properly on bus. Added delay of 2 clock period before reset the controller in case of NACK error. Signed-off-by: Alok Chauhan Acked-by: Stephen Warren --- Added the more descriptive commit message about issue in case of NACK error condition. Changed the comment in code also drivers/i2c/busses/i2c-tegra.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index e978635..dfb850a8 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -516,6 +516,14 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, if (likely(i2c_dev->msg_err == I2C_ERR_NONE)) return 0; + /* + * NACK interrupt generated before I2C controller generates the STOP + * condition on bus. So wait for some time before reset the controller + * so that STOP condition has delivered properly on bus. + */ + if (i2c_dev->msg_err == I2C_ERR_NO_ACK) + udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate)); + tegra_i2c_init(i2c_dev); if (i2c_dev->msg_err == I2C_ERR_NO_ACK) { if (msg->flags & I2C_M_IGNORE_NAK)