diff mbox

[V1] regmap: Bypassing cache when initializing cache

Message ID 1329485246-14226-1-git-send-email-ldewangan@nvidia.com
State Not Applicable, archived
Headers show

Commit Message

Laxman Dewangan Feb. 17, 2012, 1:27 p.m. UTC
During regcache_init, if client has not passed the
default data of cached register then it is directly
read from the hw to initialize cache. This hw register
read happens before cache ops are initialized and hence
avoiding register read to check for the data available
on cache or not by enabling flag of cache_bypass.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
Observed that regcache_hw_init() is gettign called before
cache->ops->init() hapens. The function regcache_hw_init()
is calling the regmap_bulk_read() which internally calls the
regcache-read() and ending with cache->ops->read() and this
cause of system crash as the cache ops are not initialized.
With this patch, avoiding the regcache-read() from
regmap_bulk_read() by enabling cache bypass.


 drivers/base/regmap/regcache.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

Comments

Mark Brown Feb. 17, 2012, 5:21 p.m. UTC | #1
On Fri, Feb 17, 2012 at 06:57:26PM +0530, Laxman Dewangan wrote:
> During regcache_init, if client has not passed the
> default data of cached register then it is directly
> read from the hw to initialize cache. This hw register
> read happens before cache ops are initialized and hence
> avoiding register read to check for the data available
> on cache or not by enabling flag of cache_bypass.

Applied, thanks.  This only affects the code after the addition of cache
integration for bulk I/O so I've added it to that branch.
diff mbox

Patch

diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c
index a10e81c..853dfff 100644
--- a/drivers/base/regmap/regcache.c
+++ b/drivers/base/regmap/regcache.c
@@ -35,12 +35,17 @@  static int regcache_hw_init(struct regmap *map)
 		return -EINVAL;
 
 	if (!map->reg_defaults_raw) {
+		u32 cache_bypass = map->cache_bypass;
 		dev_warn(map->dev, "No cache defaults, reading back from HW\n");
+
+		/* Bypass the cache access till data read from HW*/
+		map->cache_bypass = 1;
 		tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
 		if (!tmp_buf)
 			return -EINVAL;
 		ret = regmap_bulk_read(map, 0, tmp_buf,
 				       map->num_reg_defaults_raw);
+		map->cache_bypass = cache_bypass;
 		if (ret < 0) {
 			kfree(tmp_buf);
 			return ret;