From patchwork Thu Jan 26 17:07:06 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter De Schrijver X-Patchwork-Id: 137979 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 9D0851007D2 for ; Fri, 27 Jan 2012 04:08:28 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751443Ab2AZRIN (ORCPT ); Thu, 26 Jan 2012 12:08:13 -0500 Received: from hqemgate04.nvidia.com ([216.228.121.35]:2738 "EHLO hqemgate04.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751728Ab2AZRHr (ORCPT ); Thu, 26 Jan 2012 12:07:47 -0500 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate04.nvidia.com id ; Thu, 26 Jan 2012 09:06:35 -0800 Received: from hqnvemgw02.nvidia.com ([172.17.108.22]) by hqnvupgp08.nvidia.com (PGP Universal service); Thu, 26 Jan 2012 09:07:46 -0800 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Thu, 26 Jan 2012 09:07:46 -0800 Received: from thelma.nvidia.com (Not Verified[172.16.212.77]) by hqnvemgw02.nvidia.com with MailMarshal (v6, 7, 2, 8378) id ; Thu, 26 Jan 2012 09:07:47 -0800 Received: from tbergstrom-lnx.Nvidia.com (dhcp-10-21-25-176.nvidia.com [10.21.25.176]) by thelma.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id q0QH7WOL017001; Thu, 26 Jan 2012 09:07:44 -0800 (PST) From: Peter De Schrijver To: Peter De Schrijver Cc: Colin Cross , Olof Johansson , Stephen Warren , Russell King , Gary King , Arnd Bergmann , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 1/8] ARM: tegra: introduce support for reading chipid Date: Thu, 26 Jan 2012 19:07:06 +0200 Message-Id: <1327597641-7519-2-git-send-email-pdeschrijver@nvidia.com> X-Mailer: git-send-email 1.7.7.rc0.72.g4b5ea.dirty In-Reply-To: <1327597641-7519-1-git-send-email-pdeschrijver@nvidia.com> References: <1327597641-7519-1-git-send-email-pdeschrijver@nvidia.com> X-NVConfidentiality: public Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Introduce a function to read the Tegra chipid. This will be used by the SMP code to distinguish between Tegra variants. --- Should this be merged with the fuse reading code even though this is a hardwired register, not a fuse based register? Signed-off-by: Peter De Schrijver --- arch/arm/mach-tegra/chipid.h | 38 ++++++++++++++++++++++++++++++++++++++ 1 files changed, 38 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-tegra/chipid.h diff --git a/arch/arm/mach-tegra/chipid.h b/arch/arm/mach-tegra/chipid.h new file mode 100644 index 0000000..beb6a66 --- /dev/null +++ b/arch/arm/mach-tegra/chipid.h @@ -0,0 +1,38 @@ +/* + * arch/arm/mach-tegra/chipid.h + * + * Copyright (c) 2010-2012, NVIDIA Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __MACH_TEGRA_CHIPID_H +#define __MACH_TEGRA_CHIPID_H + +#define APB_MISC_GP_HIDREV 0x804 + +#define TEGRA20 0x20 +#define TEGRA30 0x30 + +#ifndef __ASSEMBLY__ + +#include + +static inline u32 tegra_get_chipid(void) +{ + return readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + + APB_MISC_GP_HIDREV) >> 8 & 0xff; +} + +#endif +#endif