From patchwork Tue Oct 18 18:20:40 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olof Johansson X-Patchwork-Id: 120481 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id C8058B71D0 for ; Wed, 19 Oct 2011 05:20:36 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751322Ab1JRSUf (ORCPT ); Tue, 18 Oct 2011 14:20:35 -0400 Received: from mail-qy0-f174.google.com ([209.85.216.174]:35774 "EHLO mail-qy0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750896Ab1JRSUf (ORCPT ); Tue, 18 Oct 2011 14:20:35 -0400 Received: by qyk4 with SMTP id 4so3604589qyk.19 for ; Tue, 18 Oct 2011 11:20:34 -0700 (PDT) Received: by 10.68.12.138 with SMTP id y10mr6517095pbb.70.1318962034144; Tue, 18 Oct 2011 11:20:34 -0700 (PDT) Received: from localhost.localdomain (173-13-129-225-sfba.hfc.comcastbusiness.net. [173.13.129.225]) by mx.google.com with ESMTPS id h5sm9575128pbq.11.2011.10.18.11.20.32 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 18 Oct 2011 11:20:33 -0700 (PDT) From: Olof Johansson To: linux-tegra@vger.kernel.org Cc: swarren@nvidia.com, ccross@android.com, linux-arm-kernel@vger.kernel.org, Olof Johansson Subject: [PATCH] ARM: tegra: fuse: use apbio dma for register access Date: Tue, 18 Oct 2011 11:20:40 -0700 Message-Id: <1318962040-21361-1-git-send-email-olof@lixom.net> X-Mailer: git-send-email 1.7.4.1 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Use the apbio dma functions for accessing the fuse registers. Signed-off-by: Olof Johansson --- This patch depends on "ARM: tegra: use APB DMA for accessing APB devices", I forgot to send them as a 2-patch series. arch/arm/mach-tegra/fuse.c | 20 ++++++++------------ 1 files changed, 8 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c index 1fa26d9..daf3f57 100644 --- a/arch/arm/mach-tegra/fuse.c +++ b/arch/arm/mach-tegra/fuse.c @@ -23,20 +23,16 @@ #include #include "fuse.h" +#include "apbio.h" #define FUSE_UID_LOW 0x108 #define FUSE_UID_HIGH 0x10c #define FUSE_SKU_INFO 0x110 #define FUSE_SPARE_BIT 0x200 -static inline u32 fuse_readl(unsigned long offset) +static inline u32 tegra_fuse_readl(unsigned long offset) { - return readl(IO_TO_VIRT(TEGRA_FUSE_BASE + offset)); -} - -static inline void fuse_writel(u32 value, unsigned long offset) -{ - writel(value, IO_TO_VIRT(TEGRA_FUSE_BASE + offset)); + return tegra_apb_readl(TEGRA_FUSE_BASE + offset); } void tegra_init_fuse(void) @@ -54,15 +50,15 @@ unsigned long long tegra_chip_uid(void) { unsigned long long lo, hi; - lo = fuse_readl(FUSE_UID_LOW); - hi = fuse_readl(FUSE_UID_HIGH); + lo = tegra_fuse_readl(FUSE_UID_LOW); + hi = tegra_fuse_readl(FUSE_UID_HIGH); return (hi << 32ull) | lo; } int tegra_sku_id(void) { int sku_id; - u32 reg = fuse_readl(FUSE_SKU_INFO); + u32 reg = tegra_fuse_readl(FUSE_SKU_INFO); sku_id = reg & 0xFF; return sku_id; } @@ -70,7 +66,7 @@ int tegra_sku_id(void) int tegra_cpu_process_id(void) { int cpu_process_id; - u32 reg = fuse_readl(FUSE_SPARE_BIT); + u32 reg = tegra_fuse_readl(FUSE_SPARE_BIT); cpu_process_id = (reg >> 6) & 3; return cpu_process_id; } @@ -78,7 +74,7 @@ int tegra_cpu_process_id(void) int tegra_core_process_id(void) { int core_process_id; - u32 reg = fuse_readl(FUSE_SPARE_BIT); + u32 reg = tegra_fuse_readl(FUSE_SPARE_BIT); core_process_id = (reg >> 12) & 3; return core_process_id; }