Show patches with: Series = Tegra DMA clocks addition / correction       |   4 patches
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[v2,4/4] clk: tegra20: Bump SCLK clock rate to 216MHz Tegra DMA clocks addition / correction 1 - - - --- 2017-10-03 Dmitry Osipenko Accepted
[v2,3/4] clk: tegra20: Use common definition of APBDMA clock gate Tegra DMA clocks addition / correction - - - - --- 2017-10-03 Dmitry Osipenko Accepted
[v2,2/4] clk: tegra: Correct parent of the APBDMA clock Tegra DMA clocks addition / correction - - - - --- 2017-10-03 Dmitry Osipenko Accepted
[v2,1/4] clk: tegra: Add AHB DMA clock entry Tegra DMA clocks addition / correction - - - - --- 2017-10-03 Dmitry Osipenko Accepted