From patchwork Mon Aug 20 09:23:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aapo Vienamo X-Patchwork-Id: 959544 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41v7f31HYPz9s3C for ; Mon, 20 Aug 2018 19:23:39 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726137AbeHTMi3 (ORCPT ); Mon, 20 Aug 2018 08:38:29 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:15199 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726132AbeHTMi3 (ORCPT ); Mon, 20 Aug 2018 08:38:29 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 20 Aug 2018 02:23:30 -0700 Received: from HQMAIL105.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 20 Aug 2018 02:23:37 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 20 Aug 2018 02:23:37 -0700 Received: from HQMAIL108.nvidia.com (172.18.146.13) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 20 Aug 2018 09:23:37 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Mon, 20 Aug 2018 09:23:37 +0000 Received: from dhcp-10-21-25-168.Nvidia.com (Not Verified[10.21.25.201]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Mon, 20 Aug 2018 02:23:36 -0700 From: Aapo Vienamo To: Adrian Hunter , Ulf Hansson , Thierry Reding , Jonathan Hunter CC: , , , Aapo Vienamo Subject: [PATCH 0/2] Tegra SDHCI rerun pad calibration periodically Date: Mon, 20 Aug 2018 12:23:31 +0300 Message-ID: <1534757013-4524-1-git-send-email-avienamo@nvidia.com> X-Mailer: git-send-email 2.7.4 X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Hi all, This series implements pad drive strength recalibration. The calibration is rerun to compensate possible changes in temperature. The calibration procedure is rerun as part of mmc_host_ops.request before sdhci_request() is run. The calibration is executed only if the 100 ms recalibration interval has passed. This series depends on the "Tegra SDHCI add support for HS200 and UHS signaling" series. Aapo Vienamo (2): mmc: sdhci: Export sdhci_request() mmc: tegra: Implement periodic pad calibration drivers/mmc/host/sdhci-tegra.c | 22 ++++++++++++++++++++++ drivers/mmc/host/sdhci.c | 3 ++- drivers/mmc/host/sdhci.h | 1 + 3 files changed, 25 insertions(+), 1 deletion(-) Acked-by: Thierry Reding