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[v5,0/7] Tegra PMC pinctrl pad configuration

Message ID 1532084355-31482-1-git-send-email-avienamo@nvidia.com
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Series Tegra PMC pinctrl pad configuration | expand

Message

Aapo Vienamo July 20, 2018, 10:59 a.m. UTC 
Hi all,

The Tegra Power Management Controller (PMC) can set pad power states
and voltage configuration. This series implements pinctrl interfaces
for configuring said pad properties.

Changelog
v5:
	- Fix a typo in "soc/tegra: pmc: Remove public pad voltage APIs"
		- 1.8 V / 3.3 V selection logic worked the wrong way
		  around on SoCs without pmc->soc->has_impl_33v_pwr.
v4:
	- Revise the dt-bindings docs
v3:
	- Don't expose tegra_io_pad_is_powered()
	- Remove tegra_io_pad_set_voltage() stub from pmc.h
		- Fixes i386 build failure reported by kbuild test robot
v2:
	- Add Tegra186 AO_HV pad
	- Make the IO pad tables narrower
	- Add parens to TEGRA_IO_PAD() and TEGRA_IO_PIN_DESC()
	- Fix a typo in the dt-bindings docs
	- Remove old pmc pad voltage configuration APIs
	- Check return value of tegra_io_pad_find() in
	  tegra_io_pad_pinconf_get()/_set()

Aapo Vienamo (7):
  soc/tegra: pmc: Fix pad voltage configuration for Tegra186
  soc/tegra: pmc: Factor out DPD register bit calculation
  soc/tegra: pmc: Implement tegra_io_pad_is_powered()
  soc/tegra: pmc: Use X macro to generate IO pad tables
  dt-bindings: Add Tegra PMC pad configuration bindings
  soc/tegra: pmc: Remove public pad voltage APIs
  soc/tegra: pmc: Implement pad configuration via pinctrl

 .../bindings/arm/tegra/nvidia,tegra186-pmc.txt     |  92 ++++
 .../bindings/arm/tegra/nvidia,tegra20-pmc.txt      | 103 +++++
 drivers/soc/tegra/pmc.c                            | 512 +++++++++++++++------
 include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h |  18 +
 include/soc/tegra/pmc.h                            |  20 +-
 5 files changed, 597 insertions(+), 148 deletions(-)
 create mode 100644 include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h