From patchwork Fri Nov 17 12:59:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 1865086 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.a=rsa-sha256 header.s=20230601 header.b=hkZSVSLk; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4SWxnR4yGWz1yS7 for ; Fri, 17 Nov 2023 23:59:39 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229543AbjKQM7j (ORCPT ); Fri, 17 Nov 2023 07:59:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231359AbjKQM7j (ORCPT ); Fri, 17 Nov 2023 07:59:39 -0500 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [IPv6:2a00:1450:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B612D5C for ; Fri, 17 Nov 2023 04:59:35 -0800 (PST) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-40853c639abso15353865e9.0 for ; Fri, 17 Nov 2023 04:59:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1700225973; x=1700830773; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EpQ8hiJaDwq9w2ctJl9hSiwcGPI9BQbencVo58l6Ffo=; b=hkZSVSLk9vm/BJg1ZK/nOc3elcDwaEJodkH1j0R5cbc1vajcWQSM+/ZsT9twraX5+f h6AcYzGNN6aoWMgmPin5ji0UIMbq2VUV8SiKiVdNN+qQTR6i6KfmTzUHxEGyqqSrPv4V IZ1m2zYc4aoegIFxtEvv/RyxE7n0++f4Ub51WlfYPgJ/rztXYzR1iDvOkfIMhcxgnXl7 RcR3dTWxn0NuH1ntLO92Dm52tb0jPGspOVkOiqZQQEYyjGTUFdgJq9mOGbO+oUJfTg7K a3YibMdkfgZ2w6yKa3dxuDt/9GXpTXUhrBoy0F1m6LiJF7f4ovLNNS+Q1fkCKKvJQGOt VG8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1700225973; x=1700830773; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EpQ8hiJaDwq9w2ctJl9hSiwcGPI9BQbencVo58l6Ffo=; b=IDxj+a2FKYLpCQ3G2m3W1hJiXVHKdwOEtnPoT8WsOb/CBvXBz51J/8UBq0fW1nX8vK spDteu8ndNDzTI/LZi0N9n/2h8W6YTuQ4EIUTm8n6vv9DuHwtjqJ/7KpERjwLkTdmbXd QLZut7g7AfgRHju0DTr0yro80gkV4v3ANBHaA9NpXWTljiTvdKVEbdgkSD+Z/M1GpvcR tiAYggSkXCloJdkFwuEmK5ziWfgu0P50upNbX2rdhcBg7XwSVrwGdJs+RxTqGQyRv69L AcWP6ffMqP7p8uR4WVFnDxPdrQf9aiCWPPHIWPGwGI+MJ8g7VXrBJg6bOfpw0c8lKWK6 sVbA== X-Gm-Message-State: AOJu0YxaMAf+gO/Ie94xnAz0i+t4sBNoO0KFCjAt6LV8OKAJYhhWl3QZ 3kfdYmNU84GXoB0aFO/Zf1pVKA== X-Google-Smtp-Source: AGHT+IE8NQpxkxGP+Ey2DyBhnqgtsrj1QQ626K6i6p8nLGIjozX1JAbKiKLiLg0yOX3km2RtZ5pLDA== X-Received: by 2002:a05:600c:3591:b0:409:295:9c6e with SMTP id p17-20020a05600c359100b0040902959c6emr14085626wmq.30.1700225973659; Fri, 17 Nov 2023 04:59:33 -0800 (PST) Received: from toaster.lan ([2a01:e0a:3c5:5fb1:8196:e423:38cb:9a09]) by smtp.googlemail.com with ESMTPSA id k21-20020a05600c1c9500b0040a487758dcsm2671343wms.6.2023.11.17.04.59.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Nov 2023 04:59:33 -0800 (PST) From: Jerome Brunet To: Thierry Reding , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Jerome Brunet , Kevin Hilman , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, JunYi Zhao Subject: [PATCH v2 2/6] dt-bindings: pwm: amlogic: add new compatible for meson8 pwm type Date: Fri, 17 Nov 2023 13:59:12 +0100 Message-ID: <20231117125919.1696980-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231117125919.1696980-1-jbrunet@baylibre.com> References: <20231117125919.1696980-1-jbrunet@baylibre.com> MIME-Version: 1.0 X-Patchwork-Bot: notify X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Add a new compatible for the pwm found in the meson8 to sm1 Amlogic SoCs. The previous clock bindings for these SoCs described the driver and not the HW itself. The clock provided was used to set the parent of the input clock mux among the possible parents hard-coded in the driver. The new bindings allows to describe the actual clock inputs of the PWM in DT, like most bindings do, instead of relying of hard-coded data. The new bindings make the old one deprecated. There is enough experience on this HW to know that the PWM is exactly the same all the supported SoCs. There is no need for a per-SoC compatible. Signed-off-by: Jerome Brunet Reviewed-by: Rob Herring --- .../devicetree/bindings/pwm/pwm-amlogic.yaml | 36 +++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml index 387976ed36d5..48b11b7d5df6 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml @@ -22,6 +22,7 @@ properties: - amlogic,meson-g12a-ao-pwm-ab - amlogic,meson-g12a-ao-pwm-cd - amlogic,meson-s4-pwm + - amlogic,meson8-pwm-v2 - items: - const: amlogic,meson-gx-pwm - const: amlogic,meson-gxbb-pwm @@ -37,7 +38,7 @@ properties: clocks: minItems: 1 - maxItems: 2 + maxItems: 4 clock-names: minItems: 1 @@ -70,11 +71,14 @@ allOf: - amlogic,meson-gx-pwm - amlogic,meson-gx-ao-pwm then: - # Historic bindings tied to the driver implementation + # Obsolete historic bindings tied to the driver implementation # The clocks provided here are meant to be matched with the input # known (hard-coded) in the driver and used to select pwm clock # source. Currently, the linux driver ignores this. + deprecated: true properties: + clocks: + maxItems: 2 clock-names: oneOf: - items: @@ -83,6 +87,27 @@ allOf: - const: clkin0 - const: clkin1 + # Newer binding where clock describe the actual clock inputs of the pwm + # block. These are necessary but some inputs may be grounded. + - if: + properties: + compatible: + contains: + enum: + - amlogic,meson8-pwm-v2 + then: + properties: + clocks: + minItems: 1 + items: + - description: input clock 0 of the pwm block + - description: input clock 1 of the pwm block + - description: input clock 2 of the pwm block + - description: input clock 3 of the pwm block + clock-names: false + required: + - clocks + # Newer IP block take a single input per channel, instead of 4 inputs # for both channels - if: @@ -112,6 +137,13 @@ examples: clock-names = "clkin0", "clkin1"; #pwm-cells = <3>; }; + - | + pwm@2000 { + compatible = "amlogic,meson8-pwm-v2"; + reg = <0x1000 0x10>; + clocks = <&xtal>, <0>, <&fdiv4>, <&fdiv5>; + #pwm-cells = <3>; + }; - | pwm@1000 { compatible = "amlogic,meson-s4-pwm";