@@ -81,15 +81,15 @@ static inline struct tegra_pwm_chip *to_tegra_pwm_chip(struct pwm_chip *chip)
return container_of(chip, struct tegra_pwm_chip, chip);
}
-static inline u32 pwm_readl(struct tegra_pwm_chip *chip, unsigned int num)
+static inline u32 pwm_readl(struct tegra_pwm_chip *pc, unsigned int num)
{
- return readl(chip->regs + (num << 4));
+ return readl(pc->regs + (num << 4));
}
-static inline void pwm_writel(struct tegra_pwm_chip *chip, unsigned int num,
+static inline void pwm_writel(struct tegra_pwm_chip *pc, unsigned int num,
unsigned long val)
{
- writel(val, chip->regs + (num << 4));
+ writel(val, pc->regs + (num << 4));
}
static int tegra_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
@@ -236,28 +236,28 @@ static const struct pwm_ops tegra_pwm_ops = {
static int tegra_pwm_probe(struct platform_device *pdev)
{
- struct tegra_pwm_chip *pwm;
+ struct tegra_pwm_chip *pc;
int ret;
- pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
- if (!pwm)
+ pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
+ if (!pc)
return -ENOMEM;
- pwm->soc = of_device_get_match_data(&pdev->dev);
- pwm->dev = &pdev->dev;
+ pc->soc = of_device_get_match_data(&pdev->dev);
+ pc->dev = &pdev->dev;
- pwm->regs = devm_platform_ioremap_resource(pdev, 0);
- if (IS_ERR(pwm->regs))
- return PTR_ERR(pwm->regs);
+ pc->regs = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(pc->regs))
+ return PTR_ERR(pc->regs);
- platform_set_drvdata(pdev, pwm);
+ platform_set_drvdata(pdev, pc);
- pwm->clk = devm_clk_get(&pdev->dev, NULL);
- if (IS_ERR(pwm->clk))
- return PTR_ERR(pwm->clk);
+ pc->clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(pc->clk))
+ return PTR_ERR(pc->clk);
/* Set maximum frequency of the IP */
- ret = clk_set_rate(pwm->clk, pwm->soc->max_frequency);
+ ret = clk_set_rate(pc->clk, pc->soc->max_frequency);
if (ret < 0) {
dev_err(&pdev->dev, "Failed to set max frequency: %d\n", ret);
return ret;
@@ -268,29 +268,29 @@ static int tegra_pwm_probe(struct platform_device *pdev)
* clock register resolutions. Get the configured frequency
* so that PWM period can be calculated more accurately.
*/
- pwm->clk_rate = clk_get_rate(pwm->clk);
+ pc->clk_rate = clk_get_rate(pc->clk);
/* Set minimum limit of PWM period for the IP */
- pwm->min_period_ns =
- (NSEC_PER_SEC / (pwm->soc->max_frequency >> PWM_DUTY_WIDTH)) + 1;
+ pc->min_period_ns =
+ (NSEC_PER_SEC / (pc->soc->max_frequency >> PWM_DUTY_WIDTH)) + 1;
- pwm->rst = devm_reset_control_get_exclusive(&pdev->dev, "pwm");
- if (IS_ERR(pwm->rst)) {
- ret = PTR_ERR(pwm->rst);
+ pc->rst = devm_reset_control_get_exclusive(&pdev->dev, "pwm");
+ if (IS_ERR(pc->rst)) {
+ ret = PTR_ERR(pc->rst);
dev_err(&pdev->dev, "Reset control is not found: %d\n", ret);
return ret;
}
- reset_control_deassert(pwm->rst);
+ reset_control_deassert(pc->rst);
- pwm->chip.dev = &pdev->dev;
- pwm->chip.ops = &tegra_pwm_ops;
- pwm->chip.npwm = pwm->soc->num_channels;
+ pc->chip.dev = &pdev->dev;
+ pc->chip.ops = &tegra_pwm_ops;
+ pc->chip.npwm = pc->soc->num_channels;
- ret = pwmchip_add(&pwm->chip);
+ ret = pwmchip_add(&pc->chip);
if (ret < 0) {
dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
- reset_control_assert(pwm->rst);
+ reset_control_assert(pc->rst);
return ret;
}
Status quo is that variables of type struct tegra_pwm_chip * are named "pwm", "chip" or "pc". The two formers are all not optimal because usually only struct pwm_device * variables are named "pwm" and "chip" is usually used for variabled of type struct pwm_chip *. So consistently use the same and non-conflicting name "pc". Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> --- drivers/pwm/pwm-tegra.c | 58 ++++++++++++++++++++--------------------- 1 file changed, 29 insertions(+), 29 deletions(-)