| Message ID | 20190312090846.29519-1-vigneshr@ti.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | pwm: tiehrpwm: Update shadow register for disabling PWMs | expand |
On Tue, Mar 12, 2019 at 02:38:46PM +0530, Vignesh Raghavendra wrote: > From: Christoph Vogtländer <c.vogtlaender@sigma-surface-science.com> > > It must be made sure that immediate mode is not already set, when > modifying shadow register value in ehrpwm_pwm_disable(). Otherwise > modifications to the action-qualifier continuous S/W force > register(AQSFRC) will be done in the active register. > This may happen when both channels are being disabled. In this case, > only the first channel state will be recorded as disabled in the shadow > register. Later, when enabling the first channel again, the second > channel would be enabled as well. Setting RLDCSF to zero, first, ensures > that the shadow register is updated as desired. > > Fixes: 38dabd91ff0b ("pwm: tiehrpwm: Fix disabling of output of PWMs") > Signed-off-by: Christoph Vogtländer <c.vogtlaender@sigma-surface-science.com> > [vigneshr@ti.com: Improve commit message] > Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> > --- > drivers/pwm/pwm-tiehrpwm.c | 2 ++ > 1 file changed, 2 insertions(+) Applied, thanks. Thierry
diff --git a/drivers/pwm/pwm-tiehrpwm.c b/drivers/pwm/pwm-tiehrpwm.c index f7b8a86fa5c5..ad4a40c0f27c 100644 --- a/drivers/pwm/pwm-tiehrpwm.c +++ b/drivers/pwm/pwm-tiehrpwm.c @@ -382,6 +382,8 @@ static void ehrpwm_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) } /* Update shadow register first before modifying active register */ + ehrpwm_modify(pc->mmio_base, AQSFRC, AQSFRC_RLDCSF_MASK, + AQSFRC_RLDCSF_ZRO); ehrpwm_modify(pc->mmio_base, AQCSFRC, aqcsfrc_mask, aqcsfrc_val); /* * Changes to immediate action on Action Qualifier. This puts