From patchwork Mon Mar 27 19:42:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ralph Sennhauser X-Patchwork-Id: 743982 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vsQ8X1FbWz9s76 for ; Tue, 28 Mar 2017 07:09:00 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Gt7Hcvnc"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751716AbdC0UIt (ORCPT ); Mon, 27 Mar 2017 16:08:49 -0400 Received: from mail-wr0-f195.google.com ([209.85.128.195]:36220 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751430AbdC0UIs (ORCPT ); Mon, 27 Mar 2017 16:08:48 -0400 Received: by mail-wr0-f195.google.com with SMTP id u1so16576332wra.3; Mon, 27 Mar 2017 13:08:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fXpoQ69mVIK4mi8UTQ8UDbWQynu6/DSo0K3SpKl5870=; b=Gt7Hcvncs8QoBMh0MEsm7dkdOIUy2DNy/j20n55XE4BKqXNt0878lmIJqIfzsl7773 kwcwbQrPHwO+nL2hmWonjXVUXfWxvOV19Hm66wgmXGVgZ4eBdQ2NTUsNDMWYJFvFMpJt bFKtzbMtpDWuoEzw15/5od1UlRGX0QbJig22JMI0W6wf5oWD0iHM4meP9UlBtLM39mJ3 AyjLwoV4nSMiTkYGndKqiRa2XwyIku89PrS5F8UfyN+WCH+nv/WlZ9NT0WHWgKkOA6w5 dTTRUZzK/GIloQmvQ/effBotTUOdoGRJ22KIrLlzOFKGOpT+vxHd4sCDRGRxnIq1RPte DtGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fXpoQ69mVIK4mi8UTQ8UDbWQynu6/DSo0K3SpKl5870=; b=tPY+uulK56Pbgm4tW/WuKsnR4MA2zHX3M0vWt338SiaakKCD08fV//vs11UAAxuuk5 AXFiATrpdILVQaDSIJ0Ck2CP3aQGll5ZcvgaJcpnX/15SLaBIyck6hbpbKYPtuVzKp9d a6W/0Q/aGKwzPBDj4n9NczaybAyEEi2WS3AL6Uxw2oUQdSM7xwPu9QgfIk70F0HAajg1 /SLbrUQ1vNHuF+WWsAlFXmHKowXsopldsHC6ShshJbpEvdSvVRpPF2g3C1fHG3V1OGZI u1SqVrj1Hsq1NZtoPpQ9wR4S1vOVlhAtjdZ9G5U+F2Co88nOCBQAM34qquHQ0+pHoQgI eDng== X-Gm-Message-State: AFeK/H1dIW05puYJieissbFOXVN3pjoKsmUq7UqZMEhLL9Pgw46fbIT3+9gh/N04gcgrzA== X-Received: by 10.28.211.9 with SMTP id k9mr11112607wmg.96.1490643794114; Mon, 27 Mar 2017 12:43:14 -0700 (PDT) Received: from localhost.lan ([37.209.189.139]) by smtp.googlemail.com with ESMTPSA id k203sm701657wmk.4.2017.03.27.12.43.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 27 Mar 2017 12:43:13 -0700 (PDT) From: Ralph Sennhauser To: Linus Walleij , Thierry Reding Cc: Imre Kaloz , Andrew Lunn , Ralph Sennhauser , Alexandre Courbot , Rob Herring , Mark Rutland , Jason Cooper , Gregory Clement , Sebastian Hesselbarth , Russell King , linux-pwm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 2/4] mvebu: xp: Add PWM properties to .dtsi files Date: Mon, 27 Mar 2017 21:42:58 +0200 Message-Id: <20170327194301.1104-3-ralph.sennhauser@gmail.com> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170327194301.1104-1-ralph.sennhauser@gmail.com> References: <20170327194301.1104-1-ralph.sennhauser@gmail.com> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org From: Andrew Lunn Add properties to the GPIO nodes to allow them to be also used as PWM lines. Signed-off-by: Andrew Lunn URL: https://patchwork.ozlabs.org/patch/427294/ [Ralph Sennhauser: * Use new compatible string marvell,armada-370-xp-gpio * Add missing reg-names / #pwm-cell properties to armada-xp-mv78260.dtsi 'gpio1' node] Signed-off-by: Ralph Sennhauser --- arch/arm/boot/dts/armada-370.dtsi | 16 +++++++++++----- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 14 ++++++++++---- arch/arm/boot/dts/armada-xp-mv78260.dtsi | 16 +++++++++++----- arch/arm/boot/dts/armada-xp-mv78460.dtsi | 16 +++++++++++----- 4 files changed, 43 insertions(+), 19 deletions(-) diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index cc011c8..e30b076 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -137,29 +137,35 @@ }; gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + compatible = "marvell,armada-370-xp-gpio"; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + compatible = "marvell,armada-370-xp-gpio"; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>, <90>; + clocks = <&coreclk 0>; }; gpio2: gpio@18180 { - compatible = "marvell,orion-gpio"; + compatible = "marvell,armada-370-xp-gpio"; reg = <0x18180 0x40>; ngpios = <2>; gpio-controller; diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index 07c5090..429ac10 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi @@ -202,25 +202,31 @@ internal-regs { gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + compatible = "marvell,armada-370-xp-gpio"; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + compatible = "marvell,armada-370-xp-gpio"; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <17>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>; + clocks = <&coreclk 0>; }; }; }; diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index 64e936a..333c470 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi @@ -285,29 +285,35 @@ internal-regs { gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + compatible = "marvell,armada-370-xp-gpio"; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + compatible = "marvell,armada-370-xp-gpio"; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>, <90>; + clocks = <&coreclk 0>; }; gpio2: gpio@18180 { - compatible = "marvell,orion-gpio"; + compatible = "marvell,armada-370-xp-gpio"; reg = <0x18180 0x40>; ngpios = <3>; gpio-controller; diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index d1383dd..2ff825d 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi @@ -323,29 +323,35 @@ internal-regs { gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + compatible = "marvell,armada-370-xp-gpio"; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + compatible = "marvell,armada-370-xp-gpio"; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>, <90>; + clocks = <&coreclk 0>; }; gpio2: gpio@18180 { - compatible = "marvell,orion-gpio"; + compatible = "marvell,armada-370-xp-gpio"; reg = <0x18180 0x40>; ngpios = <3>; gpio-controller;