From patchwork Thu Feb 16 20:27:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sylvain Lemieux X-Patchwork-Id: 728901 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vPSQc43Blz9s85 for ; Fri, 17 Feb 2017 07:28:08 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ZQq5rljl"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933101AbdBPU2F (ORCPT ); Thu, 16 Feb 2017 15:28:05 -0500 Received: from mail-it0-f68.google.com ([209.85.214.68]:34530 "EHLO mail-it0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932740AbdBPU2C (ORCPT ); Thu, 16 Feb 2017 15:28:02 -0500 Received: by mail-it0-f68.google.com with SMTP id r141so5989110ita.1; Thu, 16 Feb 2017 12:28:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LvnzXiC3xAZr7cpvChDxrLAO9J4xbLRejT66XCF5yrw=; b=ZQq5rljlSMCL2u3VBbfuf+/eWVpAByktd40uMK+WRmPPiO9L6IUEngM25rw1FGY4tf 5t3a0oN4L87rbr6gicwy5rzactQulLt9JvsiXQsNvAhzKZPKkvYSsqmiDXqnct1Rb+4G LSyXS3r1wk7Hee55+DZ98523pGrglCmjoeXpXpTqSLVQYMzUKkBz8popdGIZW3/E8Z+l 0nImHfRKn2zFf5kpz4EE59lXI/vIuwZiqgjnXJSVkym3Xr3s2I1OQsq/0xttjzEmFZjQ 37F4tFO1O4Rq7dVuI7xDxjpBCApY7t93O+0GG2e42z4uuCiFsPrxFUDPR/DWq4CG7g/k +c8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LvnzXiC3xAZr7cpvChDxrLAO9J4xbLRejT66XCF5yrw=; b=AuYApPlyLqSQX2qtGI/ZqzZiRTOPqOS6bp+XHc187oTj2+ZFsOklyGx0hYUqDubUh5 uy7pw+DbyS/bN6WByTVcCaIZTPuln0aXZgpCceucGx1zkeL/2G/sZiy8W1lZ6mgwIp4h lD/sQ9G+yVa0CtRPL5GU2l/OIooGtvXqxq6+Q3DxLCZhA3ljLkee9NU16Bs9nkmGvfiY LMyTQLcvyHFgzaw3V9/kaTM8orvB8TOKxOdqBGYI24xsUH4eL7TZ/EJx+MqNBT2JS83Z fmP1T8lTXW4UFMAd6BudQBzFZJyczdy0Sde7LwEFA4fmJS/2lG+WCQTbYxU+ym49DeeN JxPw== X-Gm-Message-State: AMke39lqK9se9HXnYlXAsKr0DjO261iua2NZ15X4jI3Me5U+qFbZzIiTxRXvnfQudBwkBQ== X-Received: by 10.107.28.204 with SMTP id c195mr4119786ioc.223.1487276881759; Thu, 16 Feb 2017 12:28:01 -0800 (PST) Received: from CABRO3AP00510.localdomain ([74.51.240.241]) by smtp.gmail.com with ESMTPSA id j19sm4684528iti.3.2017.02.16.12.28.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 16 Feb 2017 12:28:01 -0800 (PST) From: slemieux.tyco@gmail.com To: thierry.reding@gmail.com, robh+dt@kernel.org, vz@mleia.com Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RESEND PATCH 3/3] pwm: lpc32xx: remove handling of PWM channels Date: Thu, 16 Feb 2017 15:27:49 -0500 Message-Id: <20170216202749.20653-4-slemieux.tyco@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170216202749.20653-1-slemieux.tyco@gmail.com> References: <20170216202749.20653-1-slemieux.tyco@gmail.com> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org From: Vladimir Zapolskiy Because LPC32xx PWM controllers have single output which is registered as the only PWM device/channel per controller, it is known in advance that pwm->hwpwm value is always 0. On basis of this fact simplify the code by removing operations with pwm->hwpwm, there is no controls which require channel number as input. Signed-off-by: Vladimir Zapolskiy Reviewed-by: Sylvain Lemieux --- drivers/pwm/pwm-lpc32xx.c | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c index ce8418101e85..786c887c296d 100644 --- a/drivers/pwm/pwm-lpc32xx.c +++ b/drivers/pwm/pwm-lpc32xx.c @@ -55,10 +55,10 @@ static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, if (duty_cycles > 255) duty_cycles = 255; - val = readl(lpc32xx->base + (pwm->hwpwm << 2)); + val = readl(lpc32xx->base); val &= ~0xFFFF; val |= (period_cycles << 8) | duty_cycles; - writel(val, lpc32xx->base + (pwm->hwpwm << 2)); + writel(val, lpc32xx->base); return 0; } @@ -73,9 +73,9 @@ static int lpc32xx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) if (ret) return ret; - val = readl(lpc32xx->base + (pwm->hwpwm << 2)); + val = readl(lpc32xx->base); val |= PWM_ENABLE; - writel(val, lpc32xx->base + (pwm->hwpwm << 2)); + writel(val, lpc32xx->base); return 0; } @@ -85,9 +85,9 @@ static void lpc32xx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip); u32 val; - val = readl(lpc32xx->base + (pwm->hwpwm << 2)); + val = readl(lpc32xx->base); val &= ~PWM_ENABLE; - writel(val, lpc32xx->base + (pwm->hwpwm << 2)); + writel(val, lpc32xx->base); clk_disable_unprepare(lpc32xx->clk); } @@ -147,9 +147,9 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev) } /* When PWM is disable, configure the output to the default value */ - val = readl(lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2)); + val = readl(lpc32xx->base); val &= ~PWM_PIN_LEVEL; - writel(val, lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2)); + writel(val, lpc32xx->base); platform_set_drvdata(pdev, lpc32xx); @@ -159,10 +159,8 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev) static int lpc32xx_pwm_remove(struct platform_device *pdev) { struct lpc32xx_pwm_chip *lpc32xx = platform_get_drvdata(pdev); - unsigned int i; - for (i = 0; i < lpc32xx->chip.npwm; i++) - pwm_disable(&lpc32xx->chip.pwms[i]); + pwm_disable(&lpc32xx->chip.pwms[0]); return pwmchip_remove(&lpc32xx->chip); }