| Message ID | 1498802721-32455-5-git-send-email-zhi.mao@mediatek.com |
|---|---|
| State | Accepted |
| Headers | show |
On Fri, Jun 30, 2017 at 02:05:19PM +0800, Zhi Mao wrote: > add MT2712/MT7622 pwm information Please avoid duplicating the subject in the description. You're not adding any meaningful information. I've changed the commit to this: --- >8 --- dt-bindings: pwm: Add MT2712/MT7622 information Enhance the MediaTek PWM binding with details about the IP found in the MT2712 and MT7622 SoCs. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Zhi Mao <zhi.mao@mediatek.com> Acked-by: John Crispin <john@phrozen.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> --- 8< --- Applied to for-4.14/drivers, thanks. Thierry
diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt index 54c59b0..ef8bd3c 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt @@ -2,6 +2,8 @@ MediaTek PWM controller Required properties: - compatible: should be "mediatek,<name>-pwm": + - "mediatek,mt2712-pwm": found on mt2712 SoC. + - "mediatek,mt7622-pwm": found on mt7622 SoC. - "mediatek,mt7623-pwm": found on mt7623 SoC. - reg: physical base address and length of the controller's registers. - #pwm-cells: must be 2. See pwm.txt in this directory for a description of @@ -10,7 +12,9 @@ Required properties: - clock-names: must contain the following: - "top": the top clock generator - "main": clock used by the PWM core - - "pwm1-5": the five per PWM clocks + - "pwm1-8": the eight per PWM clocks for mt2712 + - "pwm1-6": the six per PWM clocks for mt7622 + - "pwm1-5": the five per PWM clocks for mt7623 - pinctrl-names: Must contain a "default" entry. - pinctrl-0: One property must exist for each entry in pinctrl-names. See pinctrl/pinctrl-bindings.txt for details of the property values.