From patchwork Wed Jan 18 14:20:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 716669 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3v3Tht09Swz9sR9 for ; Thu, 19 Jan 2017 01:23:10 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="I1UW+vz1"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752577AbdAROWS (ORCPT ); Wed, 18 Jan 2017 09:22:18 -0500 Received: from mail-wm0-f52.google.com ([74.125.82.52]:36395 "EHLO mail-wm0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752806AbdAROVy (ORCPT ); Wed, 18 Jan 2017 09:21:54 -0500 Received: by mail-wm0-f52.google.com with SMTP id c85so246244838wmi.1 for ; Wed, 18 Jan 2017 06:21:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=QznOOmMfKpnz+9Mx6YYmOSROpliZ3MGwR5WTj2skqsY=; b=I1UW+vz1dJDualGRATGBoDYMbYVDNyCwHxqDxkhCwJaedR1phnoCvMz7JFbAJiAdvB Zt4BfLeyPxhsIMrDV1u0JfOXr5KqL7ttAcc/iDIbW3B6oUFbx679Jje2pMcP6g6GQUiq h6/5ikS0t61bzEtEacXddpNBgVjjq3QKYZi3g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=QznOOmMfKpnz+9Mx6YYmOSROpliZ3MGwR5WTj2skqsY=; b=PGyLyirhZeLQCBYqfb4h8vpIUpP1aaceIgT2mVaGNGqsyTON1Bugu9/9YxNE6ON34b t9UJbnFqz3roxtXuEqWnFc/tCZzbvBd5CfsDzTDEb3491Qw6O3wj1Zos3TV0shPcVSe1 n41QQC0MNFInjm5truTRooiYO6N2MBKPKiilKd07GoajY6C32g8/ikdzlmOYAVZBYklW x5hkMJLfqLL2+V1sL/5hEGeHmUP7JfnwOb6WoMV9F+eyy8YrS4LJCJlc5XpsXbYkRKyd mgbsdk1jXQZ8QIRHC7ZHAMgyzEnZIoYcNCM8Fs0NAdHH0RRSmR29vCzONguUggGYlkQW BjXg== X-Gm-Message-State: AIkVDXK9AFrZ0Z/O9/2/Zh3x+mF+9SXmibDper72t4Ao4nkcQLmDvwPunvixQ8FzPN1DttZ3 X-Received: by 10.28.222.11 with SMTP id v11mr20013392wmg.1.1484749272688; Wed, 18 Jan 2017 06:21:12 -0800 (PST) Received: from lmenx321.st.com. ([80.215.202.29]) by smtp.gmail.com with ESMTPSA id f126sm45616924wme.22.2017.01.18.06.21.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 18 Jan 2017 06:21:12 -0800 (PST) From: Benjamin Gaignard X-Google-Original-From: Benjamin Gaignard To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, alexandre.torgue@st.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, thierry.reding@gmail.com, linux-pwm@vger.kernel.org, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net, linux-iio@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: fabrice.gasnier@st.com, gerald.baeza@st.com, arnaud.pouliquen@st.com, linaro-kernel@lists.linaro.org, benjamin.gaignard@linaro.org, Benjamin Gaignard Subject: [PATCH v8 3/8] PWM: add pwm-stm32 DT bindings Date: Wed, 18 Jan 2017 15:20:46 +0100 Message-Id: <1484749251-14445-4-git-send-email-benjamin.gaignard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1484749251-14445-1-git-send-email-benjamin.gaignard@st.com> References: <1484749251-14445-1-git-send-email-benjamin.gaignard@st.com> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Define bindings for pwm-stm32 version 8: - reword st,breakinput description. version 6: - change st,breakinput parameter format to make it usuable on stm32f7 too. version 2: - use parameters instead of compatible of handle the hardware configuration Signed-off-by: Benjamin Gaignard Acked-by: Rob Herring Acked-by: Thierry Reding --- .../devicetree/bindings/pwm/pwm-stm32.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt new file mode 100644 index 0000000..6dd0403 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt @@ -0,0 +1,35 @@ +STMicroelectronics STM32 Timers PWM bindings + +Must be a sub-node of an STM32 Timers device tree node. +See ../mfd/stm32-timers.txt for details about the parent node. + +Required parameters: +- compatible: Must be "st,stm32-pwm". +- pinctrl-names: Set to "default". +- pinctrl-0: List of phandles pointing to pin configuration nodes for PWM module. + For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt + +Optional parameters: +- st,breakinput: One or two to describe break input configurations. + "index" indicates on which break input (0 or 1) the configuration + should be applied. + "level" gives the active level (0=low or 1=high) of the input signal + for this configuration. + "filter" gives the filtering value to be applied. + +Example: + timers@40010000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40010000 0x400>; + clocks = <&rcc 0 160>; + clock-names = "clk_int"; + + pwm { + compatible = "st,stm32-pwm"; + pinctrl-0 = <&pwm1_pins>; + pinctrl-names = "default"; + st,breakinput = <0 1 5>; + }; + };