From patchwork Thu Dec 8 12:20:44 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 704040 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3tZDyZ0Ct8z9sfH for ; Thu, 8 Dec 2016 23:22:30 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="I8Fp9zVf"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753689AbcLHMW2 (ORCPT ); Thu, 8 Dec 2016 07:22:28 -0500 Received: from mail-wj0-f169.google.com ([209.85.210.169]:35476 "EHLO mail-wj0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932328AbcLHMV7 (ORCPT ); Thu, 8 Dec 2016 07:21:59 -0500 Received: by mail-wj0-f169.google.com with SMTP id v7so386930415wjy.2 for ; Thu, 08 Dec 2016 04:21:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=U4BOr3qAEvkYv3kr5SM3iiKvARwW+x9wkOf7fQVJrbM=; b=I8Fp9zVfvFWX88QeI6zTAptsEwWFKw+LTEnaGWCvLME37DMO9oKVzS7dWdlg8bawSP T6p7qPe8TpwtB7rDFlw2iFCMHGHLgQ+CsQofdlw7/FbQr/VvMYxrV55oVkbfTsHD3fhS KtUrFpxCcP3JSBct0J1c25drFp3gAmczLYJCg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=U4BOr3qAEvkYv3kr5SM3iiKvARwW+x9wkOf7fQVJrbM=; b=l4FxEB+TbtgV/qmvciZzyksqJJHaELq1j2Mwd5lxRpJDi9ioKuZ7ZNGcVwL2Zsltap 2j607y0jD1kX78wf5vHzRLGHpZpMolheAtPiROn6eL5zXH1kzmrlSThWIqCHOcSAex8K i0bOWMrXbxs5ONaQxUoOzI/Gd3P+6/J/P2aXvZB2DIl4bvRgxaw5PO102WdDLPuHT5VB FVxKVtmMPSFCyzJ+RrqkkvzJEN6LI15l4JRyLR+XVplGyIuD5cA28xXFKHDKYOY3k39o 91ZyLfZqwAE7T0DCIRtt6x09++9jozF+MPPwJnnabPdMiz4LMsYN49MrHiB4wTpLsaln 9Q1Q== X-Gm-Message-State: AKaTC03SolBUjvQOweJ/d8UkHY5ea9TH0R9QUoqhMfQ1ofiXq5mcADQPlve726Fv0vLuBpFW X-Received: by 10.194.71.69 with SMTP id s5mr64192011wju.197.1481199718259; Thu, 08 Dec 2016 04:21:58 -0800 (PST) Received: from lmenx321.st.com. ([80.214.68.50]) by smtp.gmail.com with ESMTPSA id f10sm36718072wjl.28.2016.12.08.04.21.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 08 Dec 2016 04:21:57 -0800 (PST) From: Benjamin Gaignard X-Google-Original-From: Benjamin Gaignard To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, alexandre.torgue@st.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, thierry.reding@gmail.com, linux-pwm@vger.kernel.org, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net, linux-iio@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: fabrice.gasnier@st.com, gerald.baeza@st.com, arnaud.pouliquen@st.com, linus.walleij@linaro.org, linaro-kernel@lists.linaro.org, benjamin.gaignard@linaro.org, Benjamin Gaignard Subject: [PATCH v5 1/7] MFD: add bindings for STM32 General Purpose Timer driver Date: Thu, 8 Dec 2016 13:20:44 +0100 Message-Id: <1481199650-22484-2-git-send-email-benjamin.gaignard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1481199650-22484-1-git-send-email-benjamin.gaignard@st.com> References: <1481199650-22484-1-git-send-email-benjamin.gaignard@st.com> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Add bindings information for STM32 General Purpose Timer version 2: - rename stm32-mfd-timer to stm32-gptimer - only keep one compatible string Signed-off-by: Benjamin Gaignard --- .../bindings/mfd/stm32-general-purpose-timer.txt | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/stm32-general-purpose-timer.txt diff --git a/Documentation/devicetree/bindings/mfd/stm32-general-purpose-timer.txt b/Documentation/devicetree/bindings/mfd/stm32-general-purpose-timer.txt new file mode 100644 index 0000000..ce67755 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/stm32-general-purpose-timer.txt @@ -0,0 +1,39 @@ +STM32 General Purpose Timer driver bindings + +Required parameters: +- compatible: must be "st,stm32-gptimer" + +- reg: Physical base address and length of the controller's + registers. +- clock-names: Set to "clk_int". +- clocks: Phandle to the clock used by the timer module. + For Clk properties, please refer to ../clock/clock-bindings.txt + +Optional parameters: +- resets: Phandle to the parent reset controller. + See ../reset/st,stm32-rcc.txt + +Optional subnodes: +- pwm: See ../pwm/pwm-stm32.txt +- timer: See ../iio/timer/stm32-timer-trigger.txt + +Example: + timers@40010000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-gptimer"; + reg = <0x40010000 0x400>; + clocks = <&rcc 0 160>; + clock-names = "clk_int"; + + pwm@0 { + compatible = "st,stm32-pwm"; + pinctrl-0 = <&pwm1_pins>; + pinctrl-names = "default"; + }; + + timer@0 { + compatible = "st,stm32-timer-trigger"; + reg = <0>; + }; + };