From patchwork Sun Oct 23 21:45:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 685633 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3t2DRP3TjFz9t87 for ; Mon, 24 Oct 2016 09:21:53 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756777AbcJWWVw (ORCPT ); Sun, 23 Oct 2016 18:21:52 -0400 Received: from 20.mo3.mail-out.ovh.net ([178.33.47.94]:40437 "EHLO 20.mo3.mail-out.ovh.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756769AbcJWWVw (ORCPT ); Sun, 23 Oct 2016 18:21:52 -0400 Received: from player734.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo3.mail-out.ovh.net (Postfix) with ESMTP id 7B0D93F123 for ; Sun, 23 Oct 2016 23:46:24 +0200 (CEST) Received: from localhost.localdomain (unknown [109.241.15.61]) (Authenticated sender: l.majewski@majess.pl) by player734.ha.ovh.net (Postfix) with ESMTPSA id E2ED2280070; Sun, 23 Oct 2016 23:46:12 +0200 (CEST) From: Lukasz Majewski To: Thierry Reding , Stefan Agner , Boris Brezillon Cc: linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Fabio Estevam , Fabio Estevam , Lothar Wassmann , Bhuvanchandra DV , kernel@pengutronix.de, Lukasz Majewski Subject: [PATCH 1/6] pwm: imx: Rewrite imx_pwm_*_v1 code to facilitate switch to atomic pwm operation Date: Sun, 23 Oct 2016 23:45:41 +0200 Message-Id: <1477259146-19167-2-git-send-email-l.majewski@majess.pl> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1477259146-19167-1-git-send-email-l.majewski@majess.pl> References: <1477259146-19167-1-git-send-email-l.majewski@majess.pl> X-Ovh-Tracer-Id: 3436246516887569029 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelvddrieeggddtjecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org The code has been rewritten to remove "generic" calls to imx_pwm_{enable|disable|config}. Such approach would facilitate switch to atomic PWM (a.k.a ->apply()) implementation. Suggested-by: Stefan Agner Suggested-by: Boris Brezillon Signed-off-by: Lukasz Majewski Reviewed-by: Boris Brezillon --- drivers/pwm/pwm-imx.c | 46 ++++++++++++++++++++++++++++++++++------------ 1 file changed, 34 insertions(+), 12 deletions(-) diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index c37d223..83e43d5 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -66,8 +66,6 @@ struct imx_chip { static int imx_pwm_config_v1(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) { - struct imx_chip *imx = to_imx_chip(chip); - /* * The PWM subsystem allows for exact frequencies. However, * I cannot connect a scope on my device to the PWM line and @@ -85,26 +83,52 @@ static int imx_pwm_config_v1(struct pwm_chip *chip, * both the prescaler (/1 .. /128) and then by CLKSEL * (/2 .. /16). */ + struct imx_chip *imx = to_imx_chip(chip); u32 max = readl(imx->mmio_base + MX1_PWMP); u32 p = max * duty_ns / period_ns; + int ret; + + ret = clk_prepare_enable(imx->clk_ipg); + if (ret) + return ret; + writel(max - p, imx->mmio_base + MX1_PWMS); + clk_disable_unprepare(imx->clk_ipg); + return 0; } -static void imx_pwm_set_enable_v1(struct pwm_chip *chip, bool enable) +static int imx_pwm_enable_v1(struct pwm_chip *chip, struct pwm_device *pwm) { struct imx_chip *imx = to_imx_chip(chip); + int ret; u32 val; + ret = clk_prepare_enable(imx->clk_ipg); + if (ret) + return ret; + val = readl(imx->mmio_base + MX1_PWMC); + val |= MX1_PWMC_EN; + writel(val, imx->mmio_base + MX1_PWMC); - if (enable) - val |= MX1_PWMC_EN; - else - val &= ~MX1_PWMC_EN; + clk_disable_unprepare(imx->clk_per); + + return 0; +} + +static void imx_pwm_disable_v1(struct pwm_chip *chip, struct pwm_device *pwm) +{ + struct imx_chip *imx = to_imx_chip(chip); + u32 val; + + val = readl(imx->mmio_base + MX1_PWMC); + val &= ~MX1_PWMC_EN; writel(val, imx->mmio_base + MX1_PWMC); + + clk_disable_unprepare(imx->clk_per); } static int imx_pwm_config_v2(struct pwm_chip *chip, @@ -269,9 +293,9 @@ static int imx_pwm_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm, } static struct pwm_ops imx_pwm_ops_v1 = { - .enable = imx_pwm_enable, - .disable = imx_pwm_disable, - .config = imx_pwm_config, + .enable = imx_pwm_enable_v1, + .disable = imx_pwm_disable_v1, + .config = imx_pwm_config_v1, .owner = THIS_MODULE, }; @@ -291,8 +315,6 @@ struct imx_pwm_data { }; static struct imx_pwm_data imx_pwm_data_v1 = { - .config = imx_pwm_config_v1, - .set_enable = imx_pwm_set_enable_v1, .pwm_ops = &imx_pwm_ops_v1, };