From patchwork Mon Jun 27 13:09:57 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sylvain Lemieux X-Patchwork-Id: 641010 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rdTnG1clQz9t16 for ; Mon, 27 Jun 2016 23:10:10 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=ghGL/0Af; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751655AbcF0NKJ (ORCPT ); Mon, 27 Jun 2016 09:10:09 -0400 Received: from mail-it0-f68.google.com ([209.85.214.68]:33667 "EHLO mail-it0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751634AbcF0NKI (ORCPT ); Mon, 27 Jun 2016 09:10:08 -0400 Received: by mail-it0-f68.google.com with SMTP id y93so10236162ita.0 for ; Mon, 27 Jun 2016 06:10:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lmxYNmHl0M9WDGDwKyAJabhEwiJy3mLvWLuzBFRpdtw=; b=ghGL/0AfyguBDWb3ReuEwBZo5ulb8bOGdYiOY90hwGFS3wtgPVtPrvWRkGxmbnfNsi /XJuAeT33OBjH+6Q/RzV99fVlH4O7hLLpzuKXGrAeaCTCrlFHLEXDED0jjbfT3Py48PC Ohb16Oro2X0yknmy1YrO019YPhltSn3HQS7+2orLrpUwGlFdOzTvgqewLh0v/1UqMIvl XlUTbROIh59xailTl7sWuOcdOgWG9ferNAVQqNIffB62Ws1zU+EQ7C5ImeCccaLi5nEH y9ew8Inl5oeD8bqWAQfRudClcPp5ueKCRmCHcy3eM9iXTC0jjwnajrMwRwCQEHF3/K/P jMlw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lmxYNmHl0M9WDGDwKyAJabhEwiJy3mLvWLuzBFRpdtw=; b=RIHs88uDnQ+vh7u3i5hqNNJLUbwWJj9F+i7Nd0yO+DveV3DiQ0njMwzptQj4CTOk6f NK0fb+FuhhU2lNbpqZK7uiT025fR7zgVwQ5CvrPJloYK48oX/vCM2YQQ7uQmbUb0Xybh mrltQqnxbg0AYaKJ5M9l56fY8bkbF3OpWBF0Foj4Zsd0A0cix6aWbhKOrnHVr42m4SKQ YcszbMGgf7VNYQQN0dmTX6mlMqp7tv7g0fQJMBjwdIXUBYEdJV9/z+2U/hdgKpiTUxfo JYwHZvDfosxp2ksfshc48BShHl/VIWDN8ZLbUhsiRogbuMnp5moV0Dcr3vgk5PRsAmlF gZ7g== X-Gm-Message-State: ALyK8tLsn0mH/VIC8XXc+0HaenmSkx/ZLgQIUlZLBoAwDomDgbDLHmtI2iKHPBhyEp1t0Q== X-Received: by 10.36.127.80 with SMTP id r77mr8554171itc.6.1467033007913; Mon, 27 Jun 2016 06:10:07 -0700 (PDT) Received: from CABRO3AP00510.americas.tsp.ad ([74.51.240.241]) by smtp.gmail.com with ESMTPSA id w101sm9365919ioi.12.2016.06.27.06.10.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Jun 2016 06:10:07 -0700 (PDT) From: Sylvain Lemieux To: vz@mleia.com, thierry.reding@gmail.com Cc: linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org Subject: [PATCH v2 3/3] dt-bindings: pwm: lpc32xx: Add nxp, pwm-disabled-level-high property Date: Mon, 27 Jun 2016 09:09:57 -0400 Message-Id: <1467032997-5340-4-git-send-email-slemieux.tyco@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1467032997-5340-1-git-send-email-slemieux.tyco@gmail.com> References: <1467032997-5340-1-git-send-email-slemieux.tyco@gmail.com> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org From: Sylvain Lemieux Document the nxp,pwm-disabled-level-high property used by the pwm-lpc32xx driver to setup the pin output level to high when the PWM is disabled. The driver setup the pin output level to the reset value by default. Signed-off-by: Sylvain Lemieux --- Changes from v1 to v2: * New patch in version 2. Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt index 74b5bc5..5829f3f 100644 --- a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt @@ -4,6 +4,9 @@ Required properties: - compatible: should be "nxp,lpc3220-pwm" - reg: physical base address and length of the controller's registers +Optional properties: +- nxp,pwm-disabled-level-high: Set the PWM output level to high when disabled + Examples: pwm@4005c000 {