From patchwork Fri Jun 26 09:02:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Shobhit Kumar X-Patchwork-Id: 488661 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id C497914010F for ; Fri, 26 Jun 2015 19:03:07 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752438AbbFZJDE (ORCPT ); Fri, 26 Jun 2015 05:03:04 -0400 Received: from mga02.intel.com ([134.134.136.20]:12120 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751751AbbFZJC7 (ORCPT ); Fri, 26 Jun 2015 05:02:59 -0400 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 26 Jun 2015 02:02:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,683,1427785200"; d="scan'208";a="718042778" Received: from skumar40-mobl3.gar.corp.intel.com (HELO musxmail001.imu.intel.com) ([10.106.9.33]) by orsmga001.jf.intel.com with ESMTP; 26 Jun 2015 02:02:40 -0700 From: Shobhit Kumar To: linux-pwm , intel-gfx , linux-kernel , dri-devel , linux-gpio Cc: Paul Bolle , Jani Nikula , Samuel Ortiz , Alexandre Courbot , David Airlie , Povilas Staniulis , Chih-Wei Huang , Thierry Reding , Daniel Vetter , Lee Jones , Linus Walleij , Paul Gortmaker , bloften80@gmail.com, varkabhadram@gmail.com, Shobhit Kumar Subject: [v3 4/7] mfd: intel_soc_pmic_core: ADD PWM lookup table for CRC PMIC based PWM Date: Fri, 26 Jun 2015 14:32:07 +0530 Message-Id: <1435309330-50725-5-git-send-email-shobhit.kumar@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1435309330-50725-1-git-send-email-shobhit.kumar@intel.com> References: <1435309330-50725-1-git-send-email-shobhit.kumar@intel.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org On some BYT PLatform the PWM is controlled using CRC PMIC. Add a lookup entry for the same to be used by the consumer (Intel GFX) CC: Samuel Ortiz Cc: Linus Walleij Cc: Alexandre Courbot Cc: Thierry Reding Acked-by: Lee Jones Tested-by: Ville Syrjälä Signed-off-by: Shobhit Kumar --- v2: Remove the lookup table on driver unload (Thierry) v3: Correct the subject line (Lee jones) drivers/mfd/intel_soc_pmic_core.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/mfd/intel_soc_pmic_core.c b/drivers/mfd/intel_soc_pmic_core.c index f3d918e..a00ddd9 100644 --- a/drivers/mfd/intel_soc_pmic_core.c +++ b/drivers/mfd/intel_soc_pmic_core.c @@ -25,6 +25,7 @@ #include #include #include +#include #include "intel_soc_pmic_core.h" /* Lookup table for the Panel Enable/Disable line as GPIO signals */ @@ -37,6 +38,11 @@ static struct gpiod_lookup_table panel_gpio_table = { }, }; +/* PWM consumed by the Intel GFX */ +static struct pwm_lookup crc_pwm_lookup[] = { + PWM_LOOKUP("crystal_cove_pwm", 0, "0000:00:02.0", "pwm_backlight", 0, PWM_POLARITY_NORMAL), +}; + static int intel_soc_pmic_find_gpio_irq(struct device *dev) { struct gpio_desc *desc; @@ -99,6 +105,9 @@ static int intel_soc_pmic_i2c_probe(struct i2c_client *i2c, /* Add lookup table binding for Panel Control to the GPIO Chip */ gpiod_add_lookup_table(&panel_gpio_table); + /* Add lookup table for crc-pwm */ + pwm_add_table(crc_pwm_lookup, ARRAY_SIZE(crc_pwm_lookup)); + ret = mfd_add_devices(dev, -1, config->cell_dev, config->n_cell_devs, NULL, 0, regmap_irq_get_domain(pmic->irq_chip_data)); @@ -121,6 +130,9 @@ static int intel_soc_pmic_i2c_remove(struct i2c_client *i2c) /* Remove lookup table for Panel Control from the GPIO Chip */ gpiod_remove_lookup_table(&panel_gpio_table); + /* remove crc-pwm lookup table */ + pwm_remove_table(crc_pwm_lookup, ARRAY_SIZE(crc_pwm_lookup)); + mfd_remove_devices(&i2c->dev); return 0;