From patchwork Mon Aug 18 17:29:40 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 381085 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 4B223140114 for ; Tue, 19 Aug 2014 03:31:21 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752096AbaHRR3x (ORCPT ); Mon, 18 Aug 2014 13:29:53 -0400 Received: from mail-pd0-f202.google.com ([209.85.192.202]:35301 "EHLO mail-pd0-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751786AbaHRR3w (ORCPT ); Mon, 18 Aug 2014 13:29:52 -0400 Received: by mail-pd0-f202.google.com with SMTP id w10so1398179pde.5 for ; Mon, 18 Aug 2014 10:29:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1X6tnwwFl/0JOfAq/uvAKzN/Q4Zc3i37/+f3zf2iivU=; b=IrRMP7kzJhkL1ToD3W9XauZpbf4t31GDm6aOw4KFLbM4G28EZDAU1ATa+80vAEXxSa rqfB7MXXRM3mNHi1SWTWEdO0eAM9HmaGs2TampG8wRSaT+T0GCLwNyls/dHUXp4nDWqc DrsV3Eidyvs9jpZIQc1dB96CTUH88JqcVCf4EXt/CEYyTnXZP0QeXZOZEXjDaVyX97Sp p+7tIwQ4nVB3iOqxV5SojcMkLJE3r5f/d9JXR/ej2eVdSzAfOX2oIbqmdByRtaSq/RgW alDm8qvBhxLLj4LgWDi8E6xMn2g6Ss5HtbHBiGpu+mkSQrOS+4h5a8N2oA7bVKMNkOF5 E/LQ== X-Gm-Message-State: ALoCoQnZbhDIaO3Icl04XUozYGJqvLRsKcSUutP0KMAVdm/G6qQQULAx6NZLQDRpdQheIHKSzuaX X-Received: by 10.66.245.197 with SMTP id xq5mr906557pac.42.1408382984652; Mon, 18 Aug 2014 10:29:44 -0700 (PDT) Received: from corp2gmr1-1.hot.corp.google.com (corp2gmr1-1.hot.corp.google.com [172.24.189.92]) by gmr-mx.google.com with ESMTPS id a66si73788yhg.7.2014.08.18.10.29.44 for (version=TLSv1.1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 18 Aug 2014 10:29:44 -0700 (PDT) Received: from tictac.mtv.corp.google.com (tictac.mtv.corp.google.com [172.22.162.15]) by corp2gmr1-1.hot.corp.google.com (Postfix) with ESMTP id 4746F31C5DD; Mon, 18 Aug 2014 10:29:44 -0700 (PDT) Received: by tictac.mtv.corp.google.com (Postfix, from userid 121310) id D68C8807FD; Mon, 18 Aug 2014 10:29:43 -0700 (PDT) From: Doug Anderson To: Heiko Stuebner , Thierry Reding , Caesar Wang Cc: Sonny Rao , olof@lixom.net, Eddie Cai , Doug Anderson , robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 2/4] pwm: rockchip: Allow polarity invert on rk3288 Date: Mon, 18 Aug 2014 10:29:40 -0700 Message-Id: <1408382982-2077-3-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 In-Reply-To: <1408382982-2077-1-git-send-email-dianders@chromium.org> References: <1408382982-2077-1-git-send-email-dianders@chromium.org> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org The rk3288 has the ability to invert the polarity of the PWM. Let's enable that ability. To do this we increase the number of pwm_cells to 3 to allow using the PWM_POLARITY_INVERTED flag. Since the PWM driver on rk3288 is very new, I thought this was OK. Signed-off-by: Doug Anderson --- Changes in v2: None .../devicetree/bindings/pwm/pwm-rockchip.txt | 4 +-- drivers/pwm/pwm-rockchip.c | 32 ++++++++++++++++++++-- 2 files changed, 32 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt index d47d15a..b8be3d0 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt @@ -7,8 +7,8 @@ Required properties: "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC - reg: physical base address and length of the controller's registers - clocks: phandle and clock specifier of the PWM reference clock - - #pwm-cells: should be 2. See pwm.txt in this directory for a - description of the cell format. + - #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.txt in this directory + for a description of the cell format. Example: diff --git a/drivers/pwm/pwm-rockchip.c b/drivers/pwm/pwm-rockchip.c index bdd8644..27f20d6 100644 --- a/drivers/pwm/pwm-rockchip.c +++ b/drivers/pwm/pwm-rockchip.c @@ -24,7 +24,9 @@ #define PWM_ENABLE (1 << 0) #define PWM_CONTINUOUS (1 << 1) #define PWM_DUTY_POSITIVE (1 << 3) +#define PWM_DUTY_NEGATIVE (0 << 3) #define PWM_INACTIVE_NEGATIVE (0 << 4) +#define PWM_INACTIVE_POSITIVE (1 << 4) #define PWM_OUTPUT_LEFT (0 << 5) #define PWM_LP_DISABLE (0 << 8) @@ -32,6 +34,7 @@ struct rockchip_pwm_chip { struct pwm_chip chip; struct clk *clk; const struct rockchip_pwm_data *data; + enum pwm_polarity polarity; void __iomem *base; }; @@ -45,6 +48,7 @@ struct rockchip_pwm_regs { struct rockchip_pwm_data { struct rockchip_pwm_regs regs; unsigned int prescaler; + bool has_invert; void (*set_enable)(struct pwm_chip *chip, bool enable); }; @@ -74,10 +78,14 @@ static void rockchip_pwm_set_enable_v2(struct pwm_chip *chip, bool enable) { struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip); u32 enable_conf = PWM_OUTPUT_LEFT | PWM_LP_DISABLE | PWM_ENABLE | - PWM_CONTINUOUS | PWM_DUTY_POSITIVE | - PWM_INACTIVE_NEGATIVE; + PWM_CONTINUOUS; u32 val; + if (pc->polarity == PWM_POLARITY_INVERSED) + enable_conf |= PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSITIVE; + else + enable_conf |= PWM_DUTY_POSITIVE | PWM_INACTIVE_NEGATIVE; + val = readl_relaxed(pc->base + pc->data->regs.ctrl); if (enable) @@ -124,6 +132,19 @@ static int rockchip_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, return 0; } +int rockchip_pwm_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm, + enum pwm_polarity polarity) +{ + struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip); + + if (!pc->data->has_invert) + return -ENOSYS; + + pc->polarity = polarity; + + return 0; +} + static int rockchip_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) { struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip); @@ -149,6 +170,7 @@ static void rockchip_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) static const struct pwm_ops rockchip_pwm_ops = { .config = rockchip_pwm_config, + .set_polarity = rockchip_pwm_set_polarity, .enable = rockchip_pwm_enable, .disable = rockchip_pwm_disable, .owner = THIS_MODULE, @@ -173,6 +195,7 @@ static const struct rockchip_pwm_data pwm_data_v2 = { .ctrl = 0x0c, }, .prescaler = 1, + .has_invert = 1, .set_enable = rockchip_pwm_set_enable_v2, }; @@ -184,6 +207,7 @@ static const struct rockchip_pwm_data pwm_data_vop = { .ctrl = 0x00, }, .prescaler = 1, + .has_invert = 1, .set_enable = rockchip_pwm_set_enable_v2, }; @@ -228,6 +252,10 @@ static int rockchip_pwm_probe(struct platform_device *pdev) pc->data = id->data; pc->chip.dev = &pdev->dev; pc->chip.ops = &rockchip_pwm_ops; + if (pc->data->has_invert) { + pc->chip.of_xlate = of_pwm_xlate_with_flags; + pc->chip.of_pwm_n_cells = 3; + } pc->chip.base = -1; pc->chip.npwm = 1;