From patchwork Mon Aug 18 03:32:33 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiubo Li X-Patchwork-Id: 380675 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id D214C140085 for ; Mon, 18 Aug 2014 13:39:17 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751878AbaHRDjR (ORCPT ); Sun, 17 Aug 2014 23:39:17 -0400 Received: from [207.46.163.210] ([207.46.163.210]:32822 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-FAIL-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751716AbaHRDjQ (ORCPT ); Sun, 17 Aug 2014 23:39:16 -0400 Received: from CH1PR03CA007.namprd03.prod.outlook.com (10.255.156.152) by BN1PR0301MB0611.namprd03.prod.outlook.com (25.160.170.26) with Microsoft SMTP Server (TLS) id 15.0.1010.18; Mon, 18 Aug 2014 03:36:56 +0000 Received: from BN1AFFO11FD014.protection.gbl (10.255.156.132) by CH1PR03CA007.outlook.office365.com (10.255.156.152) with Microsoft SMTP Server (TLS) id 15.0.1010.18 via Frontend Transport; Mon, 18 Aug 2014 03:36:56 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BN1AFFO11FD014.mail.protection.outlook.com (10.58.52.74) with Microsoft SMTP Server (TLS) id 15.0.1010.11 via Frontend Transport; Mon, 18 Aug 2014 03:36:55 +0000 Received: from titan.ap.freescale.net ([10.192.208.233]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s7I3aivx022216; Sun, 17 Aug 2014 20:36:51 -0700 From: Xiubo Li To: , CC: , , , , , Xiubo Li Subject: [PATCHv3 1/3] pwm: ftm-pwm: Clean up the code. Date: Mon, 18 Aug 2014 11:32:33 +0800 Message-ID: <1408332755-35102-2-git-send-email-Li.Xiubo@freescale.com> X-Mailer: git-send-email 1.8.5 In-Reply-To: <1408332755-35102-1-git-send-email-Li.Xiubo@freescale.com> References: <1408332755-35102-1-git-send-email-Li.Xiubo@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019005)(6009001)(189002)(199003)(80022001)(85306004)(86362001)(83322001)(85852003)(83072002)(89996001)(20776003)(87936001)(74662001)(77982001)(31966008)(87286001)(93916002)(76176999)(47776003)(77156001)(19580405001)(46102001)(19580395003)(68736004)(76482001)(84676001)(62966002)(92566001)(6806004)(64706001)(92726001)(50226001)(97736001)(99396002)(44976005)(50986999)(107046002)(102836001)(229853001)(105606002)(95666004)(104166001)(21056001)(26826002)(50466002)(104016003)(88136002)(4396001)(74502001)(81542001)(36756003)(81342001)(79102001)(48376002)(106466001); DIR:OUT; SFP:1102; SCL:1; SRVR:BN1PR0301MB0611; H:tx30smr01.am.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;UriScan:; X-Forefront-PRVS: 03077579FF Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=Li.Xiubo@freescale.com; X-OriginatorOrg: freescale.com Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org This patch intends to prepare for converting to direct regmap API usage. Signed-off-by: Xiubo Li --- drivers/pwm/pwm-fsl-ftm.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/pwm/pwm-fsl-ftm.c b/drivers/pwm/pwm-fsl-ftm.c index a18bc8f..96982da 100644 --- a/drivers/pwm/pwm-fsl-ftm.c +++ b/drivers/pwm/pwm-fsl-ftm.c @@ -21,11 +21,10 @@ #include #define FTM_SC 0x00 -#define FTM_SC_CLK_MASK 0x3 -#define FTM_SC_CLK_SHIFT 3 -#define FTM_SC_CLK(c) (((c) + 1) << FTM_SC_CLK_SHIFT) +#define FTM_SC_CLK_MASK_SHIFT 3 +#define FTM_SC_CLK_MASK (3 << FTM_SC_CLK_MASK_SHIFT) +#define FTM_SC_CLK(c) (((c) + 1) << FTM_SC_CLK_MASK_SHIFT) #define FTM_SC_PS_MASK 0x7 -#define FTM_SC_PS_SHIFT 0 #define FTM_CNT 0x04 #define FTM_MOD 0x08 @@ -258,7 +257,7 @@ static int fsl_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, } val = readl(fpc->base + FTM_SC); - val &= ~(FTM_SC_PS_MASK << FTM_SC_PS_SHIFT); + val &= ~FTM_SC_PS_MASK; val |= fpc->clk_ps; writel(val, fpc->base + FTM_SC); writel(period - 1, fpc->base + FTM_MOD); @@ -305,7 +304,7 @@ static int fsl_counter_clock_enable(struct fsl_pwm_chip *fpc) /* select counter clock source */ val = readl(fpc->base + FTM_SC); - val &= ~(FTM_SC_CLK_MASK << FTM_SC_CLK_SHIFT); + val &= ~FTM_SC_CLK_MASK; val |= FTM_SC_CLK(fpc->cnt_select); writel(val, fpc->base + FTM_SC); @@ -357,7 +356,7 @@ static void fsl_counter_clock_disable(struct fsl_pwm_chip *fpc) /* no users left, disable PWM counter clock */ val = readl(fpc->base + FTM_SC); - val &= ~(FTM_SC_CLK_MASK << FTM_SC_CLK_SHIFT); + val &= ~FTM_SC_CLK_MASK; writel(val, fpc->base + FTM_SC); clk_disable_unprepare(fpc->clk[FSL_PWM_CLK_CNTEN]);