From patchwork Mon Jul 14 14:33:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 369651 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id AF64D140097 for ; Tue, 15 Jul 2014 00:34:58 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755941AbaGNOe5 (ORCPT ); Mon, 14 Jul 2014 10:34:57 -0400 Received: from mail-ig0-f177.google.com ([209.85.213.177]:48296 "EHLO mail-ig0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755783AbaGNOeF (ORCPT ); Mon, 14 Jul 2014 10:34:05 -0400 Received: by mail-ig0-f177.google.com with SMTP id hn18so1730781igb.4 for ; Mon, 14 Jul 2014 07:34:04 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=E/sZut+ae4oWFCK8Vra48kqGIgnwrQLUNV0Vj9/n00s=; b=Qvj5eXIo9nWjjOhAZQyF2cUOdgEaMUNS8QQ1Zxqjvst3ETSRDxlzZSNHIVhMg9Yp4B 8i9T5ywwdssVY9+1WJRJ8HsevQy8udClBkRiOOimspDcXDecM2UB+oVBZqlkiAba7+xF T9NBwusiqDrcve9yZ4z15ghfXPTdho+0moWGItyjF5PN5/VHojNR16ioZoPF2UfL/puf eEucgXtsCzVEl3f9s2ip9O3wla2EsYbnUODdKtZ1aLNv9P2RU06SwYbYwkAFLVYvYyrm UAvS+4trK6RFVb3xe0SxzgcOgJCzlrx4vgPkjszIetnpKyfDDiay5eTWYusIvGocxSc8 HveQ== X-Gm-Message-State: ALoCoQnoLaS+RbP3vn3Lf0/BNLpX8MzQ/GZUsftnHRJaFJF6MQonq5UgdUdGIiXFP0QVBCt1svU4 X-Received: by 10.50.79.232 with SMTP id m8mr26242471igx.16.1405348444214; Mon, 14 Jul 2014 07:34:04 -0700 (PDT) Received: from localhost.localdomain (host109-148-237-85.range109-148.btcentralplus.com. [109.148.237.85]) by mx.google.com with ESMTPSA id q11sm25317390igr.7.2014.07.14.07.34.01 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 14 Jul 2014 07:34:03 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: lee.jones@linaro.org, kernel@stlinux.com, thierry.reding@gmail.com, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, ajitpal.singh@st.com Subject: [PATCH v2 08/11] pwm: st: Fix PWM prescaler handling Date: Mon, 14 Jul 2014 15:33:29 +0100 Message-Id: <1405348412-7352-9-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1405348412-7352-1-git-send-email-lee.jones@linaro.org> References: <1405348412-7352-1-git-send-email-lee.jones@linaro.org> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org From: Ajit Pal Singh This patch fixes the pwm driver to write the complete 8 bits of the prescaler value to the PWM Control register. Signed-off-by: Ajit Pal Singh Signed-off-by: Lee Jones --- drivers/pwm/pwm-sti.c | 38 +++++++++++++++++++++++++++----------- 1 file changed, 27 insertions(+), 11 deletions(-) diff --git a/drivers/pwm/pwm-sti.c b/drivers/pwm/pwm-sti.c index fdedce0..21d97bc2 100644 --- a/drivers/pwm/pwm-sti.c +++ b/drivers/pwm/pwm-sti.c @@ -25,10 +25,13 @@ #define STI_DS_REG(ch) (4 * (ch)) /* Channel's Duty Cycle register */ #define STI_PWMCR 0x50 /* Control/Config register */ #define STI_INTEN 0x54 /* Interrupt Enable/Disable register */ +#define PWM_PRESCALE_LOW_MASK 0x0f +#define PWM_PRESCALE_HIGH_MASK 0xf0 /* Regfield IDs */ enum { - PWMCLK_PRESCALE, + PWMCLK_PRESCALE_LOW, + PWMCLK_PRESCALE_HIGH, PWM_EN, PWM_INT_EN, @@ -49,7 +52,8 @@ struct sti_pwm_chip { unsigned long clk_rate; struct regmap *regmap; struct sti_pwm_compat_data *cdata; - struct regmap_field *prescale; + struct regmap_field *prescale_low; + struct regmap_field *prescale_high; struct regmap_field *pwm_en; struct regmap_field *pwm_int_en; unsigned long *pwm_periods; @@ -58,7 +62,8 @@ struct sti_pwm_chip { }; static const struct reg_field sti_pwm_regfields[MAX_REGFIELDS] = { - [PWMCLK_PRESCALE] = REG_FIELD(STI_PWMCR, 0, 3), + [PWMCLK_PRESCALE_LOW] = REG_FIELD(STI_PWMCR, 0, 3), + [PWMCLK_PRESCALE_HIGH] = REG_FIELD(STI_PWMCR, 11, 14), [PWM_EN] = REG_FIELD(STI_PWMCR, 9, 9), [PWM_INT_EN] = REG_FIELD(STI_INTEN, 0, 0), }; @@ -109,10 +114,10 @@ static int sti_pwm_cmp_periods(const void *key, const void *elt) * For STiH4xx PWM IP, the PWM period is fixed to 256 local clock cycles. * The only way to change the period (apart from changing the PWM input clock) * is to change the PWM clock prescaler. - * The prescaler is of 4 bits, so only 16 prescaler values and hence only - * 16 possible period values are supported (for a particular clock rate). + * The prescaler is of 8 bits, so 256 prescaler values and hence + * 256 possible period values are supported (for a particular clock rate). * The requested period will be applied only if it matches one of these - * 16 values. + * 256 values. */ static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) @@ -154,7 +159,13 @@ static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, if (ret) return ret; - ret = regmap_field_write(pc->prescale, prescale); + ret = regmap_field_write(pc->prescale_low, + prescale & PWM_PRESCALE_LOW_MASK); + if (ret) + goto clk_dis; + + ret = regmap_field_write(pc->prescale_high, + (prescale & PWM_PRESCALE_HIGH_MASK) >> 4); if (ret) goto clk_dis; @@ -222,10 +233,15 @@ static int sti_pwm_probe_dt(struct sti_pwm_chip *pc) reg_fields = cdata->reg_fields; - pc->prescale = devm_regmap_field_alloc(dev, pc->regmap, - reg_fields[PWMCLK_PRESCALE]); - if (IS_ERR(pc->prescale)) - return PTR_ERR(pc->prescale); + pc->prescale_low = devm_regmap_field_alloc(dev, pc->regmap, + reg_fields[PWMCLK_PRESCALE_LOW]); + if (IS_ERR(pc->prescale_low)) + return PTR_ERR(pc->prescale_low); + + pc->prescale_high = devm_regmap_field_alloc(dev, pc->regmap, + reg_fields[PWMCLK_PRESCALE_HIGH]); + if (IS_ERR(pc->prescale_high)) + return PTR_ERR(pc->prescale_high); pc->pwm_en = devm_regmap_field_alloc(dev, pc->regmap, reg_fields[PWM_EN]);