From patchwork Mon Jul 7 16:42:56 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris Brezillon X-Patchwork-Id: 367634 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id F14DF1400B9 for ; Tue, 8 Jul 2014 02:43:20 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751262AbaGGQnS (ORCPT ); Mon, 7 Jul 2014 12:43:18 -0400 Received: from top.free-electrons.com ([176.31.233.9]:58950 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751169AbaGGQnN (ORCPT ); Mon, 7 Jul 2014 12:43:13 -0400 Received: by mail.free-electrons.com (Postfix, from userid 106) id 73E0515CC; Mon, 7 Jul 2014 18:43:13 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.3.2 Received: from localhost.localdomain (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id DDA00157E; Mon, 7 Jul 2014 18:43:11 +0200 (CEST) From: Boris BREZILLON To: Samuel Ortiz , Lee Jones , Thierry Reding , linux-pwm@vger.kernel.org, David Airlie , dri-devel@lists.freedesktop.org, Nicolas Ferre , Jean-Christophe Plagniol-Villard , Alexandre Belloni , Andrew Victor Cc: Jean-Jacques Hiblot , Laurent Pinchart , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , devicetree@vger.kernel.org, Bo Shen , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org, Robert Nelson , Tim Niemeyer , Boris BREZILLON Subject: [RESEND PATCH v3 03/11] pwm: add support for atmel-hlcdc-pwm device Date: Mon, 7 Jul 2014 18:42:56 +0200 Message-Id: <1404751384-5077-4-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1404751384-5077-1-git-send-email-boris.brezillon@free-electrons.com> References: <1404751384-5077-1-git-send-email-boris.brezillon@free-electrons.com> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org The HLCDC IP available in some Atmel SoCs (i.e. sam9x5i.e. at91sam9n12, at91sam9x5 family or sama5d3 family) provide a PWM device. This driver add support for a PWM chip exposing a single PWM device (which will most likely be used to drive a backlight device). Signed-off-by: Boris BREZILLON --- drivers/pwm/Kconfig | 9 ++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-atmel-hlcdc.c | 229 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 239 insertions(+) create mode 100644 drivers/pwm/pwm-atmel-hlcdc.c diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 5b34ff2..7186242 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -50,6 +50,15 @@ config PWM_ATMEL To compile this driver as a module, choose M here: the module will be called pwm-atmel. +config PWM_ATMEL_HLCDC_PWM + tristate "Atmel HLCDC PWM support" + depends on MFD_ATMEL_HLCDC + help + Generic PWM framework driver for Atmel HLCDC PWM. + + To compile this driver as a module, choose M here: the module + will be called pwm-atmel. + config PWM_ATMEL_TCB tristate "Atmel TC Block PWM support" depends on ATMEL_TCLIB && OF diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile index e57d2c3..a245519 100644 --- a/drivers/pwm/Makefile +++ b/drivers/pwm/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_PWM) += core.o obj-$(CONFIG_PWM_SYSFS) += sysfs.o obj-$(CONFIG_PWM_AB8500) += pwm-ab8500.o obj-$(CONFIG_PWM_ATMEL) += pwm-atmel.o +obj-$(CONFIG_PWM_ATMEL_HLCDC_PWM) += pwm-atmel-hlcdc.o obj-$(CONFIG_PWM_ATMEL_TCB) += pwm-atmel-tcb.o obj-$(CONFIG_PWM_BFIN) += pwm-bfin.o obj-$(CONFIG_PWM_CLPS711X) += pwm-clps711x.o diff --git a/drivers/pwm/pwm-atmel-hlcdc.c b/drivers/pwm/pwm-atmel-hlcdc.c new file mode 100644 index 0000000..7f25197 --- /dev/null +++ b/drivers/pwm/pwm-atmel-hlcdc.c @@ -0,0 +1,229 @@ +/* + * Copyright (C) 2014 Free Electrons + * Copyright (C) 2014 Atmel + * + * Author: Boris BREZILLON + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ + +#include +#include +#include +#include +#include +#include + +#define ATMEL_HLCDC_PWMCVAL_MASK GENMASK(15, 8) +#define ATMEL_HLCDC_PWMCVAL(x) ((x << 8) & ATMEL_HLCDC_PWMCVAL_MASK) +#define ATMEL_HLCDC_PWMPOL BIT(4) +#define ATMEL_HLCDC_PWMPS_MASK GENMASK(2, 0) +#define ATMEL_HLCDC_PWMPS_MAX 0x6 +#define ATMEL_HLCDC_PWMPS(x) ((x) & ATMEL_HLCDC_PWMPS_MASK) + +struct atmel_hlcdc_pwm_chip { + struct pwm_chip chip; + struct atmel_hlcdc *hlcdc; + struct clk *cur_clk; +}; + +static inline struct atmel_hlcdc_pwm_chip * +pwm_chip_to_atmel_hlcdc_pwm_chip(struct pwm_chip *chip) +{ + return container_of(chip, struct atmel_hlcdc_pwm_chip, chip); +} + +static int atmel_hlcdc_pwm_config(struct pwm_chip *c, + struct pwm_device *pwm, + int duty_ns, int period_ns) +{ + struct atmel_hlcdc_pwm_chip *chip = + pwm_chip_to_atmel_hlcdc_pwm_chip(c); + struct atmel_hlcdc *hlcdc = chip->hlcdc; + struct clk *new_clk = hlcdc->slow_clk; + u64 pwmcval = duty_ns * 256; + unsigned long clk_freq; + u64 clk_period_ns; + u32 pwmcfg; + int pres; + + clk_freq = clk_get_rate(new_clk); + clk_period_ns = 1000000000; + clk_period_ns *= 256; + do_div(clk_period_ns, clk_freq); + + if (clk_period_ns > period_ns) { + new_clk = hlcdc->sys_clk; + clk_freq = clk_get_rate(new_clk); + clk_period_ns = 1000000000; + clk_period_ns *= 256; + do_div(clk_period_ns, clk_freq); + } + + for (pres = ATMEL_HLCDC_PWMPS_MAX; pres >= 0; pres--) { + if ((clk_period_ns << pres) <= period_ns) + break; + } + + if (pres > ATMEL_HLCDC_PWMPS_MAX) + return -EINVAL; + + pwmcfg = ATMEL_HLCDC_PWMPS(pres); + + if (new_clk != chip->cur_clk) { + u32 gencfg = 0; + + clk_prepare_enable(new_clk); + clk_disable_unprepare(chip->cur_clk); + chip->cur_clk = new_clk; + + if (new_clk != hlcdc->slow_clk) + gencfg = ATMEL_HLCDC_CLKPWMSEL; + regmap_update_bits(hlcdc->regmap, ATMEL_HLCDC_CFG(0), + ATMEL_HLCDC_CLKPWMSEL, gencfg); + } + + do_div(pwmcval, period_ns); + if (pwmcval > 255) + pwmcval = 255; + + pwmcfg |= ATMEL_HLCDC_PWMCVAL(pwmcval); + + regmap_update_bits(hlcdc->regmap, ATMEL_HLCDC_CFG(6), + ATMEL_HLCDC_PWMCVAL_MASK | ATMEL_HLCDC_PWMPS_MASK, + pwmcfg); + + return 0; +} + +static int atmel_hlcdc_pwm_set_polarity(struct pwm_chip *c, + struct pwm_device *pwm, + enum pwm_polarity polarity) +{ + struct atmel_hlcdc_pwm_chip *chip = + pwm_chip_to_atmel_hlcdc_pwm_chip(c); + struct atmel_hlcdc *hlcdc = chip->hlcdc; + u32 cfg = 0; + + if (polarity == PWM_POLARITY_NORMAL) + cfg = ATMEL_HLCDC_PWMPOL; + + regmap_update_bits(hlcdc->regmap, ATMEL_HLCDC_CFG(6), + ATMEL_HLCDC_PWMPOL, cfg); + + return 0; +} + +static int atmel_hlcdc_pwm_enable(struct pwm_chip *c, + struct pwm_device *pwm) +{ + struct atmel_hlcdc_pwm_chip *chip = + pwm_chip_to_atmel_hlcdc_pwm_chip(c); + struct atmel_hlcdc *hlcdc = chip->hlcdc; + u32 status; + + regmap_write(hlcdc->regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_PWM); + while (!regmap_read(hlcdc->regmap, ATMEL_HLCDC_SR, &status) && + !(status & ATMEL_HLCDC_PWM)) + ; + + return 0; +} + +static void atmel_hlcdc_pwm_disable(struct pwm_chip *c, + struct pwm_device *pwm) +{ + struct atmel_hlcdc_pwm_chip *chip = + pwm_chip_to_atmel_hlcdc_pwm_chip(c); + struct atmel_hlcdc *hlcdc = chip->hlcdc; + u32 status; + + regmap_write(hlcdc->regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_PWM); + while (!regmap_read(hlcdc->regmap, ATMEL_HLCDC_SR, &status) && + (status & ATMEL_HLCDC_PWM)) + ; +} + +static const struct pwm_ops atmel_hlcdc_pwm_ops = { + .config = atmel_hlcdc_pwm_config, + .set_polarity = atmel_hlcdc_pwm_set_polarity, + .enable = atmel_hlcdc_pwm_enable, + .disable = atmel_hlcdc_pwm_disable, + .owner = THIS_MODULE, +}; + +static int atmel_hlcdc_pwm_probe(struct platform_device *pdev) +{ + struct atmel_hlcdc_pwm_chip *chip; + struct device *dev = &pdev->dev; + struct atmel_hlcdc *hlcdc; + int ret; + + hlcdc = dev_get_drvdata(dev->parent); + if (!hlcdc) + return -EINVAL; + + ret = clk_prepare_enable(hlcdc->periph_clk); + if (ret) + return ret; + + chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->hlcdc = hlcdc; + chip->chip.ops = &atmel_hlcdc_pwm_ops; + chip->chip.dev = dev; + chip->chip.base = -1; + chip->chip.npwm = 1; + chip->chip.of_xlate = of_pwm_xlate_with_flags; + chip->chip.of_pwm_n_cells = 3; + chip->chip.can_sleep = 1; + + ret = pwmchip_add(&chip->chip); + if (ret) + return ret; + + platform_set_drvdata(pdev, chip); + + return 0; +} + +static int atmel_hlcdc_pwm_remove(struct platform_device *pdev) +{ + struct atmel_hlcdc_pwm_chip *chip = platform_get_drvdata(pdev); + + clk_disable_unprepare(chip->hlcdc->periph_clk); + + return pwmchip_remove(&chip->chip); +} + +static const struct of_device_id atmel_hlcdc_pwm_dt_ids[] = { + { .compatible = "atmel,hlcdc-pwm" }, + { /* sentinel */ }, +}; + +static struct platform_driver atmel_hlcdc_pwm_driver = { + .driver = { + .name = "atmel-hlcdc-pwm", + .of_match_table = atmel_hlcdc_pwm_dt_ids, + }, + .probe = atmel_hlcdc_pwm_probe, + .remove = atmel_hlcdc_pwm_remove, +}; +module_platform_driver(atmel_hlcdc_pwm_driver); + +MODULE_ALIAS("platform:atmel-hlcdc-pwm"); +MODULE_AUTHOR("Boris Brezillon "); +MODULE_DESCRIPTION("Atmel HLCDC PWM driver"); +MODULE_LICENSE("GPL");