From patchwork Tue Apr 29 03:33:46 2014
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From: Xiubo Li
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CC: , Xiubo Li
Subject: [PATCHv2 1/4] Documentation: Add 'big-endian' property for FTM PWM.
Date: Tue, 29 Apr 2014 11:33:46 +0800
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This add the big endianness usage in the binding docuementation, which
will run on LS1 SoC.
Now for the following scenarios:
SoC | CPU | FTM-PWM | 'big-endian' property is needed?
--------|--------|---------|---------------------------------
Vybird | LE | LE | No
LS1 | LE | BE | Yes
LS2 | LE | LE | No
Signed-off-by: Xiubo Li
---
Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
index 0bda229..346e2eb 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
@@ -1,5 +1,13 @@
Freescale FlexTimer Module (FTM) PWM controller
+The endianness of the FTM PWM devices on different SoCs:
+SoC | CPU | FTM-PWM | 'big-endian' property is needed?
+--------|--------|---------|---------------------------------
+Vybird | LE | LE | No
+LS1 | LE | BE | Yes
+LS2 | LE | LE | No
+
+
Required properties:
- compatible: Should be "fsl,vf610-ftm-pwm".
- reg: Physical base address and length of the controller's registers
@@ -16,7 +24,8 @@ Required properties:
- pinctrl-names: Must contain a "default" entry.
- pinctrl-NNN: One property must exist for each entry in pinctrl-names.
See pinctrl/pinctrl-bindings.txt for details of the property values.
-
+- big-endian: One boolean property, for all the device registers, the BE mode
+ will be in use if it's present, or the LE mode will be in use.
Example:
@@ -32,4 +41,5 @@ pwm0: pwm@40038000 {
<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_1>;
+ big-endian;
};