From patchwork Sat Apr 12 21:25:57 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Belloni X-Patchwork-Id: 338711 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 5D4EC1400EA for ; Sun, 13 Apr 2014 07:30:23 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755715AbaDLV2S (ORCPT ); Sat, 12 Apr 2014 17:28:18 -0400 Received: from top.free-electrons.com ([176.31.233.9]:50724 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1756234AbaDLV1G (ORCPT ); Sat, 12 Apr 2014 17:27:06 -0400 Received: by mail.free-electrons.com (Postfix, from userid 106) id 9F1A99C2; Sat, 12 Apr 2014 23:27:12 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.3.2 Received: from localhost (128-79-216-6.hfc.dyn.abo.bbox.fr [128.79.216.6]) by mail.free-electrons.com (Postfix) with ESMTPSA id 5EA607C8; Sat, 12 Apr 2014 23:27:12 +0200 (CEST) From: Alexandre Belloni To: Thierry Reding , Maxime Ripard Cc: linux-pwm@vger.kernel.org, linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Alexandre Belloni Subject: [PATCHv2 5/7] ARM: sun7i: dt: add pinmux configuration for the PWM Date: Sat, 12 Apr 2014 23:25:57 +0200 Message-Id: <1397337959-12408-6-git-send-email-alexandre.belloni@free-electrons.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1397337959-12408-1-git-send-email-alexandre.belloni@free-electrons.com> References: <1397337959-12408-1-git-send-email-alexandre.belloni@free-electrons.com> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Add the pinctrl descriptions for both PWM channels of the Allwinner A20. Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/sun7i-a20.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 32efc105df83..c6eb881a3ced 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -540,6 +540,20 @@ #size-cells = <0>; #gpio-cells = <3>; + pwm0_pins_a: pwm0@0 { + allwinner,pins = "PB2"; + allwinner,function = "pwm"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + + pwm1_pins_a: pwm1@0 { + allwinner,pins = "PI3"; + allwinner,function = "pwm"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + uart0_pins_a: uart0@0 { allwinner,pins = "PB22", "PB23"; allwinner,function = "uart0";