From patchwork Fri Apr 6 11:08:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 895666 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=cogentembedded.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=cogentembedded-com.20150623.gappssmtp.com header.i=@cogentembedded-com.20150623.gappssmtp.com header.b="Y2aTxPTT"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40HcPj4CCLz9s0y for ; Fri, 6 Apr 2018 21:08:25 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751750AbeDFLIX (ORCPT ); Fri, 6 Apr 2018 07:08:23 -0400 Received: from mail-wr0-f196.google.com ([209.85.128.196]:33659 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751494AbeDFLIW (ORCPT ); Fri, 6 Apr 2018 07:08:22 -0400 Received: by mail-wr0-f196.google.com with SMTP id z73so1399765wrb.0 for ; Fri, 06 Apr 2018 04:08:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cogentembedded-com.20150623.gappssmtp.com; s=20150623; h=subject:from:to:references:organization:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=2Fg96RPNIW4l2s1JM1Il+JvylgdoVUc2n5Q1D7/+prY=; b=Y2aTxPTT0HV9yrSEZJE+RZaRbKUbHm62R3QYQYCnVWazsJyQ004mWUSIHTscSK2TJa AttxU/evTHVeSNuC62EesUaJ3MCP3BADeyyUD60uDLbNXrg79B0Xdbum26QDowHtT87+ SDpz94GcU2l7UzME1AT1SeRlwCxpk1+QNEiEpwnD7573ziW4mFtjN3ZFluvmBi8tJQnY UiFkaq6mWiIeogzAkOGxJeb4uxWRFwLBTmhG3+g42zE/1hZkxI/4XtgvqzWgSaaNQ/4C pwBJAJEjXqf4NxKyFYkp2jf3+xZFf4TktOGTdDUO80wOLseDAUuvjatng14wudU5pMuU ANIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:from:to:references:organization :message-id:date:user-agent:mime-version:in-reply-to :content-language:content-transfer-encoding; bh=2Fg96RPNIW4l2s1JM1Il+JvylgdoVUc2n5Q1D7/+prY=; b=axIY2Z5XVtR0e5c1jDRUimudWCFnXMUfuDJIx0WPWoplOhDH07PAgBHMurclVN6Jim t62c3HI5zq+EF+sHoadjIOm8SkAu4IOXQ8haupFHnVLn9uMJ3wwOACMebYL8i7ASvduN +XZUZCoZY0gc3HRpJ5OdF/RmEdcxJ2GbJAnjJem6FA5hEV78IAQRcAmLst9O4Fm/dlYs SRgkgT1s4FOODQLBwlWWq4t3oWAmTTGXxazwZWGyNFaNzPsye+6KP4wgdjid7KwjmitR qrJOvGokNKaOWXxcOJM7dUJrXhIkpfThU+LuZdw79tVj6vb5TESwzz/hZ53tU8d5jrBQ girw== X-Gm-Message-State: ALQs6tDdlzdEfCcGVGK7o0fJy3PdLWlBRvQwEYAa3r7IRHOU6RgkKD0F Tx/8oE5mTmVooUDZcWIPjqChVw== X-Google-Smtp-Source: AIpwx481SwECetmo9I07KCGzVpPTsF9Zs3M5vv41mqg0wFGiF8w2GuJjoFAXipqTH9PtZ/e4hwZEfw== X-Received: by 2002:a19:4f0a:: with SMTP id d10-v6mr16153237lfb.134.1523012896657; Fri, 06 Apr 2018 04:08:16 -0700 (PDT) Received: from wasted.cogentembedded.com ([31.173.80.60]) by smtp.gmail.com with ESMTPSA id t8-v6sm2058120lfk.9.2018.04.06.04.08.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 06 Apr 2018 04:08:15 -0700 (PDT) Subject: [PATCH 3/4] pcie-rcar: add R-Car gen3 PHY support From: Sergei Shtylyov To: horms@verge.net.au, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Lorenzo Pieralisi References: <23335d95-63ca-b107-e43d-f4c2621adc2c@cogentembedded.com> Organization: Cogent Embedded Message-ID: Date: Fri, 6 Apr 2018 14:08:12 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: <23335d95-63ca-b107-e43d-f4c2621adc2c@cogentembedded.com> Content-Language: en-MW Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On R-Car gen3 SoCs the PCIe PHY has its own register region -- and I have written a generic PHY driver for it, thus we need to add the corresponding code in rcar_pcie_hw_init_gen3() and call devm_phy_optional_get() at the driver's probing time, so that the existing R-Car gen3 device trees (not having a PHY node) would still work (we only need to power up the PHY on R-Car V3H). Signed-off-by: Sergei Shtylyov Reviewed-by: Simon Horman --- drivers/pci/host/pcie-rcar.c | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) Index: pci/drivers/pci/host/pcie-rcar.c =================================================================== --- pci.orig/drivers/pci/host/pcie-rcar.c +++ pci/drivers/pci/host/pcie-rcar.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -140,6 +141,7 @@ static inline struct rcar_msi *to_rcar_m /* Structure representing the PCIe interface */ struct rcar_pcie { struct device *dev; + struct phy *phy; void __iomem *base; struct list_head resources; int root_bus_nr; @@ -667,6 +669,21 @@ static int rcar_pcie_hw_init_gen2(struct return rcar_pcie_hw_init(pcie); } +static int rcar_pcie_hw_init_gen3(struct rcar_pcie *pcie) +{ + int err; + + err = phy_init(pcie->phy); + if (err) + return err; + + err = phy_power_on(pcie->phy); + if (err) + return err; + + return rcar_pcie_hw_init(pcie); +} + static int rcar_msi_alloc(struct rcar_msi *chip) { int msi; @@ -916,6 +933,10 @@ static int rcar_pcie_get_resources(struc struct resource res; int err, i; + pcie->phy = devm_phy_optional_get(dev, "pcie"); + if (IS_ERR(pcie->phy)) + return PTR_ERR(pcie->phy); + err = of_address_to_resource(dev->of_node, 0, &res); if (err) return err; @@ -1068,8 +1089,10 @@ static const struct of_device_id rcar_pc .data = rcar_pcie_hw_init_gen2 }, { .compatible = "renesas,pcie-rcar-gen2", .data = rcar_pcie_hw_init_gen2 }, - { .compatible = "renesas,pcie-r8a7795", .data = rcar_pcie_hw_init }, - { .compatible = "renesas,pcie-rcar-gen3", .data = rcar_pcie_hw_init }, + { .compatible = "renesas,pcie-r8a7795", + .data = rcar_pcie_hw_init_gen3 }, + { .compatible = "renesas,pcie-rcar-gen3", + .data = rcar_pcie_hw_init_gen3 }, {}, };