From patchwork Thu Jul 9 21:20:11 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Duc Dang X-Patchwork-Id: 493583 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 288BE1402BB for ; Fri, 10 Jul 2015 07:21:54 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=apm.com header.i=@apm.com header.b=rrGeipGh; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754249AbbGIVVk (ORCPT ); Thu, 9 Jul 2015 17:21:40 -0400 Received: from mail-pd0-f174.google.com ([209.85.192.174]:35456 "EHLO mail-pd0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753892AbbGIVVW (ORCPT ); Thu, 9 Jul 2015 17:21:22 -0400 Received: by pdrg1 with SMTP id g1so39726921pdr.2 for ; Thu, 09 Jul 2015 14:21:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=apm.com; s=apm; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=YWcL14zYKWl7O4boYCZJq7D/NCFtJKnraSLZjWJgvl4=; b=rrGeipGhxzUCnSpo06lCZWEREoAsYgUE3zc/vMrsFdW7oeFzCc1RET4MbWSqOjooDD IW4isuNBy0to3m1CLFwarx10wtlRvEkGUrYTuyJEC5cYYGfVTG19LdRMuuXgbgR5gdIY 5wRoX7NrgWjIwT0IEGVEkDoVR4zcCai3z8aV4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=YWcL14zYKWl7O4boYCZJq7D/NCFtJKnraSLZjWJgvl4=; b=byKpWEWTsSSBekiqowHjp3KAVZWvsPvtWEbQ+9dc0mD0QkRZiknX+G/Tk0v9vJlfnN kTVaofxmbC9nxxrFskkPOYKZu3cjTrqK3GeZ3wfb11CRcGCUqmbLdXwAc2CTyxzPKJEP rqkBz8iX7wSASu7Tead34dq688Xda8znbSuifs3fZsbqWoeZGZgAJm/QvhxGQ/z2s8ZI 4hG9jtWXfFKdrDAPi+8mP5bhwHBlM85L87es7qa6YupKNLfIqGv8rJbJs6NVTKV/Vz1M GT8jraNQB/5V5ezwPx/h3lsJX6BKiLx0roqe/FmkMVQuGP+rVF3WVqmtoMmwe7wGla+G cVaw== X-Gm-Message-State: ALoCoQlCIo2DFvLtclx0iZH+lRRT/t2S+2TDVqR58XXSZx1KgtTv8AwsHunlh1NOvsBRfbEvHnV5 X-Received: by 10.66.101.9 with SMTP id fc9mr34430039pab.37.1436476882047; Thu, 09 Jul 2015 14:21:22 -0700 (PDT) Received: from dhdang-Precision-WorkStation-T3400.amcc.com (67-207-112-226.static.wiline.com. [67.207.112.226]) by smtp.gmail.com with ESMTPSA id ia3sm6965664pbc.31.2015.07.09.14.21.19 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 09 Jul 2015 14:21:21 -0700 (PDT) From: Duc Dang To: Bjorn Helgaas , Arnd Bergmann , Catalin Marinas , Ian Campbell , Pawel Moll , Rob Herring , Mark Rutland , Kumar Gala , Will Deacon , "David S. Miller" Cc: devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tanmay Inamdar , patches@apm.com, Duc Dang Subject: [PATCH v3 1/2] arm64: dts: Add 1 more window with large size for X-Gene PCIe nodes Date: Thu, 9 Jul 2015 14:20:11 -0700 Message-Id: X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: <1481643.dA4ocqzitg@wuerfel> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This patch adds 1 additional window with large size (up to 64GB) for X-Gene PCIe nodes to support devices that require huge BAR. Each X-Gene PCIe node now will have 2 memory windows:1 non-prefetchable 32-bit window and 1 prefetchable 64-bit window. Signed-off-by: Duc Dang Signed-off-by: Tanmay Inamdar --- arch/arm64/boot/dts/apm/apm-storm.dtsi | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi index d8f3a1c..80a8050 100644 --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi @@ -407,7 +407,8 @@ 0xe0 0xd0000000 0x0 0x00040000>; /* PCI config space */ reg-names = "csr", "cfg"; ranges = <0x01000000 0x00 0x00000000 0xe0 0x10000000 0x00 0x00010000 /* io */ - 0x02000000 0x00 0x80000000 0xe1 0x80000000 0x00 0x80000000>; /* mem */ + 0x02000000 0x00 0x80000000 0xe1 0x80000000 0x00 0x80000000 /* mem */ + 0x43000000 0xf0 0x00000000 0xf0 0x00000000 0x10 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; @@ -430,8 +431,9 @@ reg = < 0x00 0x1f2c0000 0x0 0x00010000 /* Controller registers */ 0xd0 0xd0000000 0x0 0x00040000>; /* PCI config space */ reg-names = "csr", "cfg"; - ranges = <0x01000000 0x0 0x00000000 0xd0 0x10000000 0x00 0x00010000 /* io */ - 0x02000000 0x0 0x80000000 0xd1 0x80000000 0x00 0x80000000>; /* mem */ + ranges = <0x01000000 0x00 0x00000000 0xd0 0x10000000 0x00 0x00010000 /* io */ + 0x02000000 0x00 0x80000000 0xd1 0x80000000 0x00 0x80000000 /* mem */ + 0x43000000 0xd8 0x00000000 0xd8 0x00000000 0x08 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; @@ -454,8 +456,9 @@ reg = < 0x00 0x1f2d0000 0x0 0x00010000 /* Controller registers */ 0x90 0xd0000000 0x0 0x00040000>; /* PCI config space */ reg-names = "csr", "cfg"; - ranges = <0x01000000 0x0 0x00000000 0x90 0x10000000 0x0 0x00010000 /* io */ - 0x02000000 0x0 0x80000000 0x91 0x80000000 0x0 0x80000000>; /* mem */ + ranges = <0x01000000 0x00 0x00000000 0x90 0x10000000 0x00 0x00010000 /* io */ + 0x02000000 0x00 0x80000000 0x91 0x80000000 0x00 0x80000000 /* mem */ + 0x43000000 0x94 0x00000000 0x94 0x00000000 0x04 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; @@ -478,8 +481,9 @@ reg = < 0x00 0x1f500000 0x0 0x00010000 /* Controller registers */ 0xa0 0xd0000000 0x0 0x00040000>; /* PCI config space */ reg-names = "csr", "cfg"; - ranges = <0x01000000 0x0 0x00000000 0xa0 0x10000000 0x0 0x00010000 /* io */ - 0x02000000 0x0 0x80000000 0xa1 0x80000000 0x0 0x80000000>; /* mem */ + ranges = <0x01000000 0x00 0x00000000 0xa0 0x10000000 0x00 0x00010000 /* io */ + 0x02000000 0x00 0x80000000 0xa1 0x80000000 0x00 0x80000000 /* mem */ + 0x43000000 0xb0 0x00000000 0xb0 0x00000000 0x10 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; @@ -502,8 +506,9 @@ reg = < 0x00 0x1f510000 0x0 0x00010000 /* Controller registers */ 0xc0 0xd0000000 0x0 0x00200000>; /* PCI config space */ reg-names = "csr", "cfg"; - ranges = <0x01000000 0x0 0x00000000 0xc0 0x10000000 0x0 0x00010000 /* io */ - 0x02000000 0x0 0x80000000 0xc1 0x80000000 0x0 0x80000000>; /* mem */ + ranges = <0x01000000 0x00 0x00000000 0xc0 0x10000000 0x00 0x00010000 /* io */ + 0x02000000 0x00 0x80000000 0xc1 0x80000000 0x00 0x80000000 /* mem */ + 0x43000000 0xc8 0x00000000 0xc8 0x00000000 0x08 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; interrupt-map-mask = <0x0 0x0 0x0 0x7>;