From patchwork Thu Apr 26 23:14:57 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 155341 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 9E50DB6FC2 for ; Fri, 27 Apr 2012 09:15:23 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755371Ab2DZXPW (ORCPT ); Thu, 26 Apr 2012 19:15:22 -0400 Received: from mail-lb0-f174.google.com ([209.85.217.174]:55016 "EHLO mail-lb0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750864Ab2DZXPV convert rfc822-to-8bit (ORCPT ); Thu, 26 Apr 2012 19:15:21 -0400 Received: by lbbgf7 with SMTP id gf7so106430lbb.19 for ; Thu, 26 Apr 2012 16:15:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; 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Thu, 26 Apr 2012 16:15:18 -0700 (PDT) Received: by 10.112.23.40 with SMTP id j8mr4241599lbf.44.1335482118068; Thu, 26 Apr 2012 16:15:18 -0700 (PDT) MIME-Version: 1.0 Received: by 10.112.130.41 with HTTP; Thu, 26 Apr 2012 16:14:57 -0700 (PDT) In-Reply-To: <403610A45A2B5242BD291EDAE8B37D300FD8BEA9@SHSMSX102.ccr.corp.intel.com> References: <403610A45A2B5242BD291EDAE8B37D300FD24698@SHSMSX102.ccr.corp.intel.com> <403610A45A2B5242BD291EDAE8B37D300FD3ABC3@SHSMSX101.ccr.corp.intel.com> <403610A45A2B5242BD291EDAE8B37D300FD8BEA9@SHSMSX102.ccr.corp.intel.com> From: Bjorn Helgaas Date: Thu, 26 Apr 2012 17:14:57 -0600 Message-ID: Subject: Re: [PATCH v6] Quirk for IVB graphics FLR errata To: "Hao, Xudong" Cc: "linux-pci@vger.kernel.org" , Don Dutile , Matthew Wilcox , "Zhang, Xiantao" X-System-Of-Record: true X-Gm-Message-State: ALoCoQnRv4gqJ0hU/jjEfhGmQa17M1kkDCKjlhEz4Li//L1E0lmb4LILc0XZ1DxxPXKoXPFSKHunhLjRtf7SYX4ppSvQ0+6LbujfTj9U4N9t7PHH35EUvW0YzYF2WI+eF4BQaZcMB2dcWauQi2yDUGN0u0yHvr/pRQ== Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Wed, Apr 25, 2012 at 9:19 PM, Hao, Xudong wrote: > For IvyBridge Mobile platform, a system hang may occur if a FLR(Function Level Reset) is asserted to internal graphics. > > This quirk patch is workaround for the IVB FLR errata issue. > We are disabling the FLR reset handshake between the PCH and CPU display, then > manually powering down the panel power sequencing and resetting the PCH display. > > Signed-off-by: Xudong Hao > Signed-off-by: Kay, Allen M > Signed-off-by: Matthew Wilcox > --- >  drivers/pci/quirks.c |   48 ++++++++++++++++++++++++++++++++++++++++++++++++ >  1 files changed, 48 insertions(+), 0 deletions(-) > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index 4bf7102..213cad9 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -29,6 +29,7 @@ >  #include >  #include >  #include   /* isa_dma_bridge_buggy */ > +#include >  #include "pci.h" > >  /* > @@ -3085,11 +3086,58 @@ static int reset_intel_82599_sfp_virtfn(struct pci_dev *dev, int probe) >        return 0; >  } > > +#include "../gpu/drm/i915/i915_reg.h" > +#define MSG_CTL        0x45010 > +#define IGD_OPERATION_TIMEOUT 10000     /* set timeout 10 seconds */ > + > +static int reset_ivb_igd(struct pci_dev *dev, int probe) > +{ > +       void __iomem *mmio_base; > +       unsigned long timeout; > +       u32 val; > + > +       if (probe) > +               return 0; > + > +       mmio_base = ioremap_nocache(pci_resource_start(dev, 0), > +                               pci_resource_len(dev, 0)); > +       if (!mmio_base) > +               return -ENOMEM; > + > +       /* Work Around */ > +       writel(0x00000002, mmio_base + MSG_CTL); > +       /* Clobbering SOUTH_CHICKEN2 register is fine only if the next > +        * driver loaded sets the right bits. However, this's a reset and > +        * the bits have been set by i915 previously, so we clobber > +        * SOUTH_CHICKEN2 register directly here. > +        */ > +       writel(0x00000005, mmio_base + SOUTH_CHICKEN2); > +       val = readl(mmio_base + PCH_PP_CONTROL) & 0xfffffffe; > +       writel(val, mmio_base + PCH_PP_CONTROL); > +       timeout = jiffies + msecs_to_jiffies(IGD_OPERATION_TIMEOUT); > +       while (time_before(jiffies, timeout)) { > +               val = readl(mmio_base + PCH_PP_STATUS); > +               if ((val & 0xB0000000) == 0) > +                       break; > +               cpu_relax(); > +       } > +       writel(0x00000002, mmio_base + 0xd0100); > + > +       iounmap(pci_resource_start(dev, 0)); > +       return 0; > +} > + >  #define PCI_DEVICE_ID_INTEL_82599_SFP_VF   0x10ed > +#define PCI_DEVICE_ID_INTEL_IVB_M_VGA      0x0156 > +#define PCI_DEVICE_ID_INTEL_IVB_M2_VGA     0x0166 > >  static const struct pci_dev_reset_methods pci_dev_reset_methods[] = { >        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82599_SFP_VF, >                 reset_intel_82599_sfp_virtfn }, > +       { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IVB_M_VGA, > +               reset_ivb_igd }, > +       { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IVB_M2_VGA, > +               reset_ivb_igd }, >        { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, >                reset_intel_generic_dev }, >        { 0 } > -- > 1.6.0.rc1 > > >> If we're doing FLR in a pass-through situation, where the host does >> the FLR but has no driver for the device, doing this in a quirk makes >> sense to me. >> >> I tried to apply this patch, but it's whitespace-damaged.  Can you repost it? >> > > > Thanks Bjorn, I repost it and can you try again? Did you change anything, or did you just repost it the same way you did before? The patch I see is still corrupted. Here's what I see: The "=20" is bogus. --- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -29,6 +29,7 @@ #include #include #include /* isa_dma_bridge_buggy */ +#include #include "pci.h" =20 ...