diff mbox series

[v9,1/2] PCI: Microchip: Add host driver for Microchip PCIe controller

Message ID 5dc3002680da40400b083748329d8b736219952e.camel@microchip.com
State New
Headers show
Series PCI: Microchip: Add host driver for Microchip PCIe controller | expand

Commit Message

Daire McNamara May 20, 2020, 11:44 a.m. UTC 
This patch adds device tree bindings for the Microchip
PCIe PolarFire PCIe controller when configured in
host (Root Complex) mode.

Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
---
 .../bindings/pci/microchip,pcie-host.yaml     | 94 +++++++++++++++++++
 1 file changed, 94 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml

Comments

Rob Herring May 21, 2020, 7:56 p.m. UTC | #1 
On Wed, 20 May 2020 11:44:36 +0000, Daire.McNamara@microchip.com wrote:
> 
> This patch adds device tree bindings for the Microchip
> PCIe PolarFire PCIe controller when configured in
> host (Root Complex) mode.
> 
> Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
> ---
>  .../bindings/pci/microchip,pcie-host.yaml     | 94 +++++++++++++++++++
>  1 file changed, 94 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
> 


My bot found errors running 'make dt_binding_check' on your patch:

/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml: properties:interrupts: {'minItems': 1, 'maxItems': 1, 'items': [{'description': 'PCIe host controller and builtin MSI controller'}]} is not valid under any of the given schemas (Possible causes of the failure):
	/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml: properties:interrupts: 'minItems' is not one of ['description', 'deprecated', 'const', 'enum', 'minimum', 'maximum', 'default', '$ref']
	/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml: properties:interrupts:maxItems: 1 is less than the minimum of 2

Documentation/devicetree/bindings/Makefile:12: recipe for target 'Documentation/devicetree/bindings/pci/microchip,pcie-host.example.dts' failed
make[1]: *** [Documentation/devicetree/bindings/pci/microchip,pcie-host.example.dts] Error 1
make[1]: *** Waiting for unfinished jobs....
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml: ignoring, error in schema: properties: interrupts
warning: no schema found in file: ./Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml: ignoring, error in schema: properties: interrupts
warning: no schema found in file: ./Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
Makefile:1300: recipe for target 'dt_binding_check' failed
make: *** [dt_binding_check] Error 2

See https://patchwork.ozlabs.org/patch/1294277

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:

pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade

Please check and re-submit.
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
new file mode 100644
index 000000000000..d3bcdab282c2
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
@@ -0,0 +1,94 @@ 
+# SPDX-License-Identifier: GPL-2.0-only
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/microchip,pcie-host.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip PCIe Root Port Bridge Controller
+
+maintainers:
+  - Daire McNamara <daire.mcnamara@microchip.com>
+
+allOf:
+  - $ref: /schemas/pci/pci-bus.yaml#
+
+properties:
+  compatible:
+    const: microchip,pcie-host-1.0 # PolarFire
+
+  reg:
+    maxItems: 2
+
+  reg-names:
+    items:
+      - const: cfg
+      - const: apb
+
+  interrupts:
+    minItems: 1
+    maxItems: 1
+    items:
+      - description: PCIe host controller and builtin MSI controller
+
+  interrupt-names:
+    minItems: 1
+    maxItems: 1
+    items:
+      - const: pcie/msi
+
+  ranges:
+    maxItems: 1
+
+  dma-ranges:
+    maxItems: 1
+
+  msi-controller:
+    description: Identifies the node as an MSI controller.
+
+  msi-parent:
+    description: MSI controller the device is capable of using.
+
+required:
+  - reg
+  - reg-names
+  - dma-ranges
+  - "#interrupt-cells"
+  - interrupts
+  - interrupt-names
+  - interrupt-map-mask
+  - interrupt-map
+  - msi-controller
+
+examples:
+  - |
+    soc {
+        pcie0: pcie@2030000000 {
+            #address-cells = <0x3>;
+            #interrupt-cells = <0x1>;
+            #size-cells = <0x2>;
+            compatible = "microchip,pcie-host-1.0";
+            device_type = "pci";
+            bus-range = <0x00 0x7f>;
+            // PCI_DEVICE(3) INT#(1) CONTROLLER(PHANDLE) CONTROLLER_DATA(1)
+            interrupt-map = <0 0 0 1 &pcie0 0>,
+                            <0 0 0 2 &pcie0 1>,
+                            <0 0 0 3 &pcie0 2>,
+                            <0 0 0 4 &pcie0 3>;
+            interrupt-map-mask = <0 0 0 7>;
+            interrupt-parent = <&plic0>;
+            interrupts = <32>;
+
+            // BUS_ADDRESS(3) CPU_PHYSICAL(2) SIZE(2)
+            ranges = <0x03000000 0x0 0x40000000 0x0 0x40000000 0x0 0x20000000>;
+            dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x1 0x00000000>;
+
+            // CPU_PHYSICAL(2) SIZE(2)
+            reg = <0x20 0x30000000 0x0 0x4000000>,
+                  <0x20        0x0 0x0  0x100000>;
+            reg-names = "cfg", "apb";
+            msi-parent = <&pcie0>;
+            msi-controller;
+            interrupt-controller;
+        };
+    };
+...