| Message ID | 5bfa0cf053878e0e859a8b97227ca03ea4d50e92.1529329262.git.gustavo.pimentel@synopsys.com |
|---|---|
| State | Superseded |
| Delegated to: | Lorenzo Pieralisi |
| Headers | show |
| Series | Add MSI-X support on pcitest tool | expand |
Hi Gustavo,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on pci/next]
[also build test ERROR on v4.18-rc1 next-20180618]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Gustavo-Pimentel/Add-MSI-X-support-on-pcitest-tool/20180619-004625
base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
config: ia64-allmodconfig (attached as .config)
compiler: ia64-linux-gcc (GCC) 8.1.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=8.1.0 make.cross ARCH=ia64
All errors (new ones prefixed by >>):
>> drivers/pci/controller/pcie-rockchip-ep.c:516:15: error: initialization of 'int (*)(struct pci_epc *, u8, enum pci_epc_irq_type, u16)' {aka 'int (*)(struct pci_epc *, unsigned char, enum pci_epc_irq_type, short unsigned int)'} from incompatible pointer type 'int (*)(struct pci_epc *, u8, enum pci_epc_irq_type, u8)' {aka 'int (*)(struct pci_epc *, unsigned char, enum pci_epc_irq_type, unsigned char)'} [-Werror=incompatible-pointer-types]
.raise_irq = rockchip_pcie_ep_raise_irq,
^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pci/controller/pcie-rockchip-ep.c:516:15: note: (near initialization for 'rockchip_pcie_epc_ops.raise_irq')
cc1: some warnings being treated as errors
vim +516 drivers/pci/controller/pcie-rockchip-ep.c
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 507
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 508 static const struct pci_epc_ops rockchip_pcie_epc_ops = {
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 509 .write_header = rockchip_pcie_ep_write_header,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 510 .set_bar = rockchip_pcie_ep_set_bar,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 511 .clear_bar = rockchip_pcie_ep_clear_bar,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 512 .map_addr = rockchip_pcie_ep_map_addr,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 513 .unmap_addr = rockchip_pcie_ep_unmap_addr,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 514 .set_msi = rockchip_pcie_ep_set_msi,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 515 .get_msi = rockchip_pcie_ep_get_msi,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 @516 .raise_irq = rockchip_pcie_ep_raise_irq,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 517 .start = rockchip_pcie_ep_start,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 518 };
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 519
:::::: The code at line 516 was first introduced by commit
:::::: cf590b07839133146842d2d3d9a68f804c2edc4b PCI: rockchip: Add EP driver for Rockchip PCIe controller
:::::: TO: Shawn Lin <shawn.lin@rock-chips.com>
:::::: CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
Hi Gustavo,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on pci/next]
[also build test ERROR on v4.18-rc1 next-20180618]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Gustavo-Pimentel/Add-MSI-X-support-on-pcitest-tool/20180619-004625
base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
config: arm-allmodconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.2.0 make.cross ARCH=arm
All errors (new ones prefixed by >>):
>> drivers/pci/controller/pcie-rockchip-ep.c:516:15: error: initialization from incompatible pointer type [-Werror=incompatible-pointer-types]
.raise_irq = rockchip_pcie_ep_raise_irq,
^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pci/controller/pcie-rockchip-ep.c:516:15: note: (near initialization for 'rockchip_pcie_epc_ops.raise_irq')
cc1: some warnings being treated as errors
vim +516 drivers/pci/controller/pcie-rockchip-ep.c
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 507
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 508 static const struct pci_epc_ops rockchip_pcie_epc_ops = {
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 509 .write_header = rockchip_pcie_ep_write_header,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 510 .set_bar = rockchip_pcie_ep_set_bar,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 511 .clear_bar = rockchip_pcie_ep_clear_bar,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 512 .map_addr = rockchip_pcie_ep_map_addr,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 513 .unmap_addr = rockchip_pcie_ep_unmap_addr,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 514 .set_msi = rockchip_pcie_ep_set_msi,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 515 .get_msi = rockchip_pcie_ep_get_msi,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 @516 .raise_irq = rockchip_pcie_ep_raise_irq,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 517 .start = rockchip_pcie_ep_start,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 518 };
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 519
:::::: The code at line 516 was first introduced by commit
:::::: cf590b07839133146842d2d3d9a68f804c2edc4b PCI: rockchip: Add EP driver for Rockchip PCIe controller
:::::: TO: Shawn Lin <shawn.lin@rock-chips.com>
:::::: CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
Hi Gustavo,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on pci/next]
[also build test WARNING on v4.18-rc1 next-20180618]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Gustavo-Pimentel/Add-MSI-X-support-on-pcitest-tool/20180619-004625
base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
reproduce:
# apt-get install sparse
make ARCH=x86_64 allmodconfig
make C=1 CF=-D__CHECK_ENDIAN__
sparse warnings: (new ones prefixed by >>)
drivers/pci/controller/pcie-rockchip-ep.c:173:14: sparse: expression using sizeof(void)
>> drivers/pci/controller/pcie-rockchip-ep.c:516:27: sparse: incorrect type in initializer (incompatible argument 4 (different type sizes)) @@ expected int ( *raise_irq )( ... ) @@ got int ( *raise_irq )( ... ) @@
drivers/pci/controller/pcie-rockchip-ep.c:516:27: expected int ( *raise_irq )( ... )
drivers/pci/controller/pcie-rockchip-ep.c:516:27: got int ( *<noident> )( ... )
drivers/pci/controller/pcie-rockchip-ep.c:516:15: error: initialization from incompatible pointer type [-Werror=incompatible-pointer-types]
.raise_irq = rockchip_pcie_ep_raise_irq,
^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pci/controller/pcie-rockchip-ep.c:516:15: note: (near initialization for 'rockchip_pcie_epc_ops.raise_irq')
cc1: some warnings being treated as errors
vim +516 drivers/pci/controller/pcie-rockchip-ep.c
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 507
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 508 static const struct pci_epc_ops rockchip_pcie_epc_ops = {
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 509 .write_header = rockchip_pcie_ep_write_header,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 510 .set_bar = rockchip_pcie_ep_set_bar,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 511 .clear_bar = rockchip_pcie_ep_clear_bar,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 512 .map_addr = rockchip_pcie_ep_map_addr,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 513 .unmap_addr = rockchip_pcie_ep_unmap_addr,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 514 .set_msi = rockchip_pcie_ep_set_msi,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 515 .get_msi = rockchip_pcie_ep_get_msi,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 @516 .raise_irq = rockchip_pcie_ep_raise_irq,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 517 .start = rockchip_pcie_ep_start,
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 518 };
cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 519
:::::: The code at line 516 was first introduced by commit
:::::: cf590b07839133146842d2d3d9a68f804c2edc4b PCI: rockchip: Add EP driver for Rockchip PCIe controller
:::::: TO: Shawn Lin <shawn.lin@rock-chips.com>
:::::: CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
Hi, On Monday 18 June 2018 08:30 PM, Gustavo Pimentel wrote: > Change {cdns, dra7xx, artpec6}_pcie_ep_raise_irq() and pci_epc_raise_irq() > signature, namely the interrupt_num variable type from u8 to u16 to > accommodate 2048 maximum MSI-X interrupts. > > Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> > Acked-by: Alan Douglas <adouglas@cadence.com> This patch should precede patch #2 and the following hunk from patch #2 should be added here. --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -191,7 +191,7 @@ enum dw_pcie_as_type { struct dw_pcie_ep_ops { void (*ep_init)(struct dw_pcie_ep *ep); int (*raise_irq)(struct dw_pcie_ep *ep, u8 func_no, - enum pci_epc_irq_type type, u8 interrupt_num); + enum pci_epc_irq_type type, u16 interrupt_num); }; Thanks Kishon > --- > Change v1->v2: > - Nothing changed, just to follow the patch set version. > Change v2->v3: > - Move into here the pci_epc_raise_irq() signature change from patch > file #1. > - Move into here the {dra7xx, artpec6}_pcie_ep_raise_irq() signature > changes from patch file #2. > Change v3->v4: > - Rebased to Lorenzo's master branch v4.18-rc1. > > drivers/pci/controller/dwc/pci-dra7xx.c | 2 +- > drivers/pci/controller/dwc/pcie-artpec6.c | 2 +- > drivers/pci/controller/pcie-cadence-ep.c | 3 ++- > drivers/pci/endpoint/pci-epc-core.c | 8 ++++---- > include/linux/pci-epc.h | 6 +++--- > 5 files changed, 11 insertions(+), 10 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c > index 345aab5..ce9224a 100644 > --- a/drivers/pci/controller/dwc/pci-dra7xx.c > +++ b/drivers/pci/controller/dwc/pci-dra7xx.c > @@ -370,7 +370,7 @@ static void dra7xx_pcie_raise_msi_irq(struct dra7xx_pcie *dra7xx, > } > > static int dra7xx_pcie_raise_irq(struct dw_pcie_ep *ep, u8 func_no, > - enum pci_epc_irq_type type, u8 interrupt_num) > + enum pci_epc_irq_type type, u16 interrupt_num) > { > struct dw_pcie *pci = to_dw_pcie_from_ep(ep); > struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci); > diff --git a/drivers/pci/controller/dwc/pcie-artpec6.c b/drivers/pci/controller/dwc/pcie-artpec6.c > index 321b56c..9a2474b 100644 > --- a/drivers/pci/controller/dwc/pcie-artpec6.c > +++ b/drivers/pci/controller/dwc/pcie-artpec6.c > @@ -428,7 +428,7 @@ static void artpec6_pcie_ep_init(struct dw_pcie_ep *ep) > } > > static int artpec6_pcie_raise_irq(struct dw_pcie_ep *ep, u8 func_no, > - enum pci_epc_irq_type type, u8 interrupt_num) > + enum pci_epc_irq_type type, u16 interrupt_num) > { > struct dw_pcie *pci = to_dw_pcie_from_ep(ep); > > diff --git a/drivers/pci/controller/pcie-cadence-ep.c b/drivers/pci/controller/pcie-cadence-ep.c > index e3fe412..208d11f 100644 > --- a/drivers/pci/controller/pcie-cadence-ep.c > +++ b/drivers/pci/controller/pcie-cadence-ep.c > @@ -363,7 +363,8 @@ static int cdns_pcie_ep_send_msi_irq(struct cdns_pcie_ep *ep, u8 fn, > } > > static int cdns_pcie_ep_raise_irq(struct pci_epc *epc, u8 fn, > - enum pci_epc_irq_type type, u8 interrupt_num) > + enum pci_epc_irq_type type, > + u16 interrupt_num) > { > struct cdns_pcie_ep *ep = epc_get_drvdata(epc); > > diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c > index 7d77bd0..c72e656 100644 > --- a/drivers/pci/endpoint/pci-epc-core.c > +++ b/drivers/pci/endpoint/pci-epc-core.c > @@ -131,13 +131,13 @@ EXPORT_SYMBOL_GPL(pci_epc_start); > * pci_epc_raise_irq() - interrupt the host system > * @epc: the EPC device which has to interrupt the host > * @func_no: the endpoint function number in the EPC device > - * @type: specify the type of interrupt; legacy or MSI > - * @interrupt_num: the MSI interrupt number > + * @type: specify the type of interrupt; legacy, MSI or MSI-X > + * @interrupt_num: the MSI or MSI-X interrupt number > * > - * Invoke to raise an MSI or legacy interrupt > + * Invoke to raise an legacy, MSI or MSI-X interrupt > */ > int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no, > - enum pci_epc_irq_type type, u8 interrupt_num) > + enum pci_epc_irq_type type, u16 interrupt_num) > { > int ret; > unsigned long flags; > diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h > index 89f079f..bb2395b 100644 > --- a/include/linux/pci-epc.h > +++ b/include/linux/pci-epc.h > @@ -35,7 +35,7 @@ enum pci_epc_irq_type { > * MSI-X capability register > * @get_msix: ops to get the number of MSI-X interrupts allocated by the RC > * from the MSI-X capability register > - * @raise_irq: ops to raise a legacy or MSI interrupt > + * @raise_irq: ops to raise a legacy, MSI or MSI-X interrupt > * @start: ops to start the PCI link > * @stop: ops to stop the PCI link > * @owner: the module owner containing the ops > @@ -56,7 +56,7 @@ struct pci_epc_ops { > int (*set_msix)(struct pci_epc *epc, u8 func_no, u16 interrupts); > int (*get_msix)(struct pci_epc *epc, u8 func_no); > int (*raise_irq)(struct pci_epc *epc, u8 func_no, > - enum pci_epc_irq_type type, u8 interrupt_num); > + enum pci_epc_irq_type type, u16 interrupt_num); > int (*start)(struct pci_epc *epc); > void (*stop)(struct pci_epc *epc); > struct module *owner; > @@ -154,7 +154,7 @@ int pci_epc_get_msi(struct pci_epc *epc, u8 func_no); > int pci_epc_set_msix(struct pci_epc *epc, u8 func_no, u16 interrupts); > int pci_epc_get_msix(struct pci_epc *epc, u8 func_no); > int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no, > - enum pci_epc_irq_type type, u8 interrupt_num); > + enum pci_epc_irq_type type, u16 interrupt_num); > int pci_epc_start(struct pci_epc *epc); > void pci_epc_stop(struct pci_epc *epc); > struct pci_epc *pci_epc_get(const char *epc_name); >
Hi, Thanks for the suggestion. Regards, Gustavo On 18/06/2018 20:31, kbuild test robot wrote: > Hi Gustavo, > > Thank you for the patch! Perhaps something to improve: > > [auto build test WARNING on pci/next] > [also build test WARNING on v4.18-rc1 next-20180618] > [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] > > url: https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_0day-2Dci_linux_commits_Gustavo-2DPimentel_Add-2DMSI-2DX-2Dsupport-2Don-2Dpcitest-2Dtool_20180619-2D004625&d=DwIBAg&c=DPL6_X_6JkXFx7AXWqB0tg&r=bkWxpLoW-f-E3EdiDCCa0_h0PicsViasSlvIpzZvPxs&m=IFx9JKJsE2KvE7siiXs4GRW2a3OkFpE8BFO41SbTjJA&s=vuOhITY-_4Y-jxzyQ1ddb6M8E9-OELpKXzcJZqgWqvE&e= > base: https://urldefense.proofpoint.com/v2/url?u=https-3A__git.kernel.org_pub_scm_linux_kernel_git_helgaas_pci.git&d=DwIBAg&c=DPL6_X_6JkXFx7AXWqB0tg&r=bkWxpLoW-f-E3EdiDCCa0_h0PicsViasSlvIpzZvPxs&m=IFx9JKJsE2KvE7siiXs4GRW2a3OkFpE8BFO41SbTjJA&s=7xs_oUDvo5HRxpqsZAqdybMJcJDO6K3hooyy-CmXwkM&e= next > reproduce: > # apt-get install sparse > make ARCH=x86_64 allmodconfig > make C=1 CF=-D__CHECK_ENDIAN__ > > > sparse warnings: (new ones prefixed by >>) > > drivers/pci/controller/pcie-rockchip-ep.c:173:14: sparse: expression using sizeof(void) >>> drivers/pci/controller/pcie-rockchip-ep.c:516:27: sparse: incorrect type in initializer (incompatible argument 4 (different type sizes)) @@ expected int ( *raise_irq )( ... ) @@ got int ( *raise_irq )( ... ) @@ > drivers/pci/controller/pcie-rockchip-ep.c:516:27: expected int ( *raise_irq )( ... ) > drivers/pci/controller/pcie-rockchip-ep.c:516:27: got int ( *<noident> )( ... ) > drivers/pci/controller/pcie-rockchip-ep.c:516:15: error: initialization from incompatible pointer type [-Werror=incompatible-pointer-types] > .raise_irq = rockchip_pcie_ep_raise_irq, > ^~~~~~~~~~~~~~~~~~~~~~~~~~ > drivers/pci/controller/pcie-rockchip-ep.c:516:15: note: (near initialization for 'rockchip_pcie_epc_ops.raise_irq') > cc1: some warnings being treated as errors > > vim +516 drivers/pci/controller/pcie-rockchip-ep.c > > cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 507 > cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 508 static const struct pci_epc_ops rockchip_pcie_epc_ops = { > cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 509 .write_header = rockchip_pcie_ep_write_header, > cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 510 .set_bar = rockchip_pcie_ep_set_bar, > cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 511 .clear_bar = rockchip_pcie_ep_clear_bar, > cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 512 .map_addr = rockchip_pcie_ep_map_addr, > cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 513 .unmap_addr = rockchip_pcie_ep_unmap_addr, > cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 514 .set_msi = rockchip_pcie_ep_set_msi, > cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 515 .get_msi = rockchip_pcie_ep_get_msi, > cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 @516 .raise_irq = rockchip_pcie_ep_raise_irq, > cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 517 .start = rockchip_pcie_ep_start, > cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 518 }; > cf590b07 drivers/pci/host/pcie-rockchip-ep.c Shawn Lin 2018-05-09 519 > > :::::: The code at line 516 was first introduced by commit > :::::: cf590b07839133146842d2d3d9a68f804c2edc4b PCI: rockchip: Add EP driver for Rockchip PCIe controller > > :::::: TO: Shawn Lin <shawn.lin@rock-chips.com> > :::::: CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> > > --- > 0-DAY kernel test infrastructure Open Source Technology Center > https://urldefense.proofpoint.com/v2/url?u=https-3A__lists.01.org_pipermail_kbuild-2Dall&d=DwIBAg&c=DPL6_X_6JkXFx7AXWqB0tg&r=bkWxpLoW-f-E3EdiDCCa0_h0PicsViasSlvIpzZvPxs&m=IFx9JKJsE2KvE7siiXs4GRW2a3OkFpE8BFO41SbTjJA&s=Mf1d7cz8MbsSZPkgXFwnxZJY1579nwc7-mpjeQBdweY&e= Intel Corporation >
Hi, On 20/06/2018 07:47, Kishon Vijay Abraham I wrote: > Hi, > > On Monday 18 June 2018 08:30 PM, Gustavo Pimentel wrote: >> Change {cdns, dra7xx, artpec6}_pcie_ep_raise_irq() and pci_epc_raise_irq() >> signature, namely the interrupt_num variable type from u8 to u16 to >> accommodate 2048 maximum MSI-X interrupts. >> >> Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> >> Acked-by: Alan Douglas <adouglas@cadence.com> > > This patch should precede patch #2 and the following hunk from patch #2 should > be added here. > > --- a/drivers/pci/controller/dwc/pcie-designware.h > +++ b/drivers/pci/controller/dwc/pcie-designware.h > @@ -191,7 +191,7 @@ enum dw_pcie_as_type { > struct dw_pcie_ep_ops { > void (*ep_init)(struct dw_pcie_ep *ep); > int (*raise_irq)(struct dw_pcie_ep *ep, u8 func_no, > - enum pci_epc_irq_type type, u8 interrupt_num); > + enum pci_epc_irq_type type, u16 interrupt_num); > }; Yes, it it makes a lot more sense in the other patch file. Thanks. Gustavo > > Thanks > Kishon > >> --- >> Change v1->v2: >> - Nothing changed, just to follow the patch set version. >> Change v2->v3: >> - Move into here the pci_epc_raise_irq() signature change from patch >> file #1. >> - Move into here the {dra7xx, artpec6}_pcie_ep_raise_irq() signature >> changes from patch file #2. >> Change v3->v4: >> - Rebased to Lorenzo's master branch v4.18-rc1. >> >> drivers/pci/controller/dwc/pci-dra7xx.c | 2 +- >> drivers/pci/controller/dwc/pcie-artpec6.c | 2 +- >> drivers/pci/controller/pcie-cadence-ep.c | 3 ++- >> drivers/pci/endpoint/pci-epc-core.c | 8 ++++---- >> include/linux/pci-epc.h | 6 +++--- >> 5 files changed, 11 insertions(+), 10 deletions(-) >> >> diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c >> index 345aab5..ce9224a 100644 >> --- a/drivers/pci/controller/dwc/pci-dra7xx.c >> +++ b/drivers/pci/controller/dwc/pci-dra7xx.c >> @@ -370,7 +370,7 @@ static void dra7xx_pcie_raise_msi_irq(struct dra7xx_pcie *dra7xx, >> } >> >> static int dra7xx_pcie_raise_irq(struct dw_pcie_ep *ep, u8 func_no, >> - enum pci_epc_irq_type type, u8 interrupt_num) >> + enum pci_epc_irq_type type, u16 interrupt_num) >> { >> struct dw_pcie *pci = to_dw_pcie_from_ep(ep); >> struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci); >> diff --git a/drivers/pci/controller/dwc/pcie-artpec6.c b/drivers/pci/controller/dwc/pcie-artpec6.c >> index 321b56c..9a2474b 100644 >> --- a/drivers/pci/controller/dwc/pcie-artpec6.c >> +++ b/drivers/pci/controller/dwc/pcie-artpec6.c >> @@ -428,7 +428,7 @@ static void artpec6_pcie_ep_init(struct dw_pcie_ep *ep) >> } >> >> static int artpec6_pcie_raise_irq(struct dw_pcie_ep *ep, u8 func_no, >> - enum pci_epc_irq_type type, u8 interrupt_num) >> + enum pci_epc_irq_type type, u16 interrupt_num) >> { >> struct dw_pcie *pci = to_dw_pcie_from_ep(ep); >> >> diff --git a/drivers/pci/controller/pcie-cadence-ep.c b/drivers/pci/controller/pcie-cadence-ep.c >> index e3fe412..208d11f 100644 >> --- a/drivers/pci/controller/pcie-cadence-ep.c >> +++ b/drivers/pci/controller/pcie-cadence-ep.c >> @@ -363,7 +363,8 @@ static int cdns_pcie_ep_send_msi_irq(struct cdns_pcie_ep *ep, u8 fn, >> } >> >> static int cdns_pcie_ep_raise_irq(struct pci_epc *epc, u8 fn, >> - enum pci_epc_irq_type type, u8 interrupt_num) >> + enum pci_epc_irq_type type, >> + u16 interrupt_num) >> { >> struct cdns_pcie_ep *ep = epc_get_drvdata(epc); >> >> diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c >> index 7d77bd0..c72e656 100644 >> --- a/drivers/pci/endpoint/pci-epc-core.c >> +++ b/drivers/pci/endpoint/pci-epc-core.c >> @@ -131,13 +131,13 @@ EXPORT_SYMBOL_GPL(pci_epc_start); >> * pci_epc_raise_irq() - interrupt the host system >> * @epc: the EPC device which has to interrupt the host >> * @func_no: the endpoint function number in the EPC device >> - * @type: specify the type of interrupt; legacy or MSI >> - * @interrupt_num: the MSI interrupt number >> + * @type: specify the type of interrupt; legacy, MSI or MSI-X >> + * @interrupt_num: the MSI or MSI-X interrupt number >> * >> - * Invoke to raise an MSI or legacy interrupt >> + * Invoke to raise an legacy, MSI or MSI-X interrupt >> */ >> int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no, >> - enum pci_epc_irq_type type, u8 interrupt_num) >> + enum pci_epc_irq_type type, u16 interrupt_num) >> { >> int ret; >> unsigned long flags; >> diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h >> index 89f079f..bb2395b 100644 >> --- a/include/linux/pci-epc.h >> +++ b/include/linux/pci-epc.h >> @@ -35,7 +35,7 @@ enum pci_epc_irq_type { >> * MSI-X capability register >> * @get_msix: ops to get the number of MSI-X interrupts allocated by the RC >> * from the MSI-X capability register >> - * @raise_irq: ops to raise a legacy or MSI interrupt >> + * @raise_irq: ops to raise a legacy, MSI or MSI-X interrupt >> * @start: ops to start the PCI link >> * @stop: ops to stop the PCI link >> * @owner: the module owner containing the ops >> @@ -56,7 +56,7 @@ struct pci_epc_ops { >> int (*set_msix)(struct pci_epc *epc, u8 func_no, u16 interrupts); >> int (*get_msix)(struct pci_epc *epc, u8 func_no); >> int (*raise_irq)(struct pci_epc *epc, u8 func_no, >> - enum pci_epc_irq_type type, u8 interrupt_num); >> + enum pci_epc_irq_type type, u16 interrupt_num); >> int (*start)(struct pci_epc *epc); >> void (*stop)(struct pci_epc *epc); >> struct module *owner; >> @@ -154,7 +154,7 @@ int pci_epc_get_msi(struct pci_epc *epc, u8 func_no); >> int pci_epc_set_msix(struct pci_epc *epc, u8 func_no, u16 interrupts); >> int pci_epc_get_msix(struct pci_epc *epc, u8 func_no); >> int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no, >> - enum pci_epc_irq_type type, u8 interrupt_num); >> + enum pci_epc_irq_type type, u16 interrupt_num); >> int pci_epc_start(struct pci_epc *epc); >> void pci_epc_stop(struct pci_epc *epc); >> struct pci_epc *pci_epc_get(const char *epc_name); >>
diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c index 345aab5..ce9224a 100644 --- a/drivers/pci/controller/dwc/pci-dra7xx.c +++ b/drivers/pci/controller/dwc/pci-dra7xx.c @@ -370,7 +370,7 @@ static void dra7xx_pcie_raise_msi_irq(struct dra7xx_pcie *dra7xx, } static int dra7xx_pcie_raise_irq(struct dw_pcie_ep *ep, u8 func_no, - enum pci_epc_irq_type type, u8 interrupt_num) + enum pci_epc_irq_type type, u16 interrupt_num) { struct dw_pcie *pci = to_dw_pcie_from_ep(ep); struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci); diff --git a/drivers/pci/controller/dwc/pcie-artpec6.c b/drivers/pci/controller/dwc/pcie-artpec6.c index 321b56c..9a2474b 100644 --- a/drivers/pci/controller/dwc/pcie-artpec6.c +++ b/drivers/pci/controller/dwc/pcie-artpec6.c @@ -428,7 +428,7 @@ static void artpec6_pcie_ep_init(struct dw_pcie_ep *ep) } static int artpec6_pcie_raise_irq(struct dw_pcie_ep *ep, u8 func_no, - enum pci_epc_irq_type type, u8 interrupt_num) + enum pci_epc_irq_type type, u16 interrupt_num) { struct dw_pcie *pci = to_dw_pcie_from_ep(ep); diff --git a/drivers/pci/controller/pcie-cadence-ep.c b/drivers/pci/controller/pcie-cadence-ep.c index e3fe412..208d11f 100644 --- a/drivers/pci/controller/pcie-cadence-ep.c +++ b/drivers/pci/controller/pcie-cadence-ep.c @@ -363,7 +363,8 @@ static int cdns_pcie_ep_send_msi_irq(struct cdns_pcie_ep *ep, u8 fn, } static int cdns_pcie_ep_raise_irq(struct pci_epc *epc, u8 fn, - enum pci_epc_irq_type type, u8 interrupt_num) + enum pci_epc_irq_type type, + u16 interrupt_num) { struct cdns_pcie_ep *ep = epc_get_drvdata(epc); diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index 7d77bd0..c72e656 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -131,13 +131,13 @@ EXPORT_SYMBOL_GPL(pci_epc_start); * pci_epc_raise_irq() - interrupt the host system * @epc: the EPC device which has to interrupt the host * @func_no: the endpoint function number in the EPC device - * @type: specify the type of interrupt; legacy or MSI - * @interrupt_num: the MSI interrupt number + * @type: specify the type of interrupt; legacy, MSI or MSI-X + * @interrupt_num: the MSI or MSI-X interrupt number * - * Invoke to raise an MSI or legacy interrupt + * Invoke to raise an legacy, MSI or MSI-X interrupt */ int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no, - enum pci_epc_irq_type type, u8 interrupt_num) + enum pci_epc_irq_type type, u16 interrupt_num) { int ret; unsigned long flags; diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 89f079f..bb2395b 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -35,7 +35,7 @@ enum pci_epc_irq_type { * MSI-X capability register * @get_msix: ops to get the number of MSI-X interrupts allocated by the RC * from the MSI-X capability register - * @raise_irq: ops to raise a legacy or MSI interrupt + * @raise_irq: ops to raise a legacy, MSI or MSI-X interrupt * @start: ops to start the PCI link * @stop: ops to stop the PCI link * @owner: the module owner containing the ops @@ -56,7 +56,7 @@ struct pci_epc_ops { int (*set_msix)(struct pci_epc *epc, u8 func_no, u16 interrupts); int (*get_msix)(struct pci_epc *epc, u8 func_no); int (*raise_irq)(struct pci_epc *epc, u8 func_no, - enum pci_epc_irq_type type, u8 interrupt_num); + enum pci_epc_irq_type type, u16 interrupt_num); int (*start)(struct pci_epc *epc); void (*stop)(struct pci_epc *epc); struct module *owner; @@ -154,7 +154,7 @@ int pci_epc_get_msi(struct pci_epc *epc, u8 func_no); int pci_epc_set_msix(struct pci_epc *epc, u8 func_no, u16 interrupts); int pci_epc_get_msix(struct pci_epc *epc, u8 func_no); int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no, - enum pci_epc_irq_type type, u8 interrupt_num); + enum pci_epc_irq_type type, u16 interrupt_num); int pci_epc_start(struct pci_epc *epc); void pci_epc_stop(struct pci_epc *epc); struct pci_epc *pci_epc_get(const char *epc_name);
Change {cdns, dra7xx, artpec6}_pcie_ep_raise_irq() and pci_epc_raise_irq() signature, namely the interrupt_num variable type from u8 to u16 to accommodate 2048 maximum MSI-X interrupts. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Acked-by: Alan Douglas <adouglas@cadence.com> --- Change v1->v2: - Nothing changed, just to follow the patch set version. Change v2->v3: - Move into here the pci_epc_raise_irq() signature change from patch file #1. - Move into here the {dra7xx, artpec6}_pcie_ep_raise_irq() signature changes from patch file #2. Change v3->v4: - Rebased to Lorenzo's master branch v4.18-rc1. drivers/pci/controller/dwc/pci-dra7xx.c | 2 +- drivers/pci/controller/dwc/pcie-artpec6.c | 2 +- drivers/pci/controller/pcie-cadence-ep.c | 3 ++- drivers/pci/endpoint/pci-epc-core.c | 8 ++++---- include/linux/pci-epc.h | 6 +++--- 5 files changed, 11 insertions(+), 10 deletions(-)