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Extending kernel option pci=resource_alignment to be able to specify PCI device/vendor IDs - Documentation

Message ID 57A9955B.1050705@etas.com
State Accepted
Headers show

Commit Message

Koehrer Mathias (ETAS/ESW5) Aug. 9, 2016, 8:33 a.m. UTC
Extend the documentation for kernel option pci=resource_alignment

Some uio based PCI drivers (e.g. uio_cif) do not work if the assigned 
PCI memory resources are not page aligned.
By using the kernel option "pci=resource_alignment" it is possible to force
single PCI boards to use page alignment for their memory resources.
However, this is fairly cumbersome if multiple of these boards are in use as 
the specification of the cards has to be done via PCI bus/slot/function number
which might change e.g. by adding another board.
This patch extends the kernel option "pci=resource_alignment" to allow to
specify the relevant boards via PCI device/vendor (and subdevice/subvendor) ids.
The specification of the devices via device/vendor is indicated by a leading
string "pci:" as argument to "pci=resource_alignment".
The format of the specification is
  pci:<vendor>:<device>[:<subvendor>:<subdevice>]

Examples: 
  pci=resource_alignment=4096@pci:1234:abcd:1234:bcde
  pci=resource_alignment=pci:1234:abcd

Signed-off-by: Mathias Koehrer <mathias.koehrer@etas.com>

---
 pci/Documentation/kernel-parameters.txt |    3 +++
 1 file changed, 3 insertions(+)

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diff mbox

Patch

Index: linux-pci-git/pci/Documentation/kernel-parameters.txt
===================================================================
--- linux-pci-git.orig/pci/Documentation/kernel-parameters.txt
+++ linux-pci-git/pci/Documentation/kernel-parameters.txt
@@ -3032,6 +3032,9 @@  bytes respectively. Such letter suffixes
 				PAGE_SIZE is used as alignment.
 				PCI-PCI bridge can be specified, if resource
 				windows need to be expanded.
+				To specify the alignment for certain types of devices, the
+				PCI vendor/device (and subvendor/subdevice) may be
+				specified. E.g. 4096@pci:1234:abcd:1234:bcde
 		ecrc=		Enable/disable PCIe ECRC (transaction layer
 				end-to-end CRC checking).
 				bios: Use BIOS/firmware settings. This is the