From patchwork Mon Aug 5 07:21:35 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenzhong Duan X-Patchwork-Id: 264584 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 0D4992C0084 for ; Mon, 5 Aug 2013 17:22:02 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754878Ab3HEHVq (ORCPT ); Mon, 5 Aug 2013 03:21:46 -0400 Received: from aserp1040.oracle.com ([141.146.126.69]:51109 "EHLO aserp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754933Ab3HEHVo (ORCPT ); Mon, 5 Aug 2013 03:21:44 -0400 Received: from ucsinet22.oracle.com (ucsinet22.oracle.com [156.151.31.94]) by aserp1040.oracle.com (Sentrion-MTA-4.3.1/Sentrion-MTA-4.3.1) with ESMTP id r757Ld47019896 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Mon, 5 Aug 2013 07:21:40 GMT Received: from userz7022.oracle.com (userz7022.oracle.com [156.151.31.86]) by ucsinet22.oracle.com (8.14.4+Sun/8.14.4) with ESMTP id r757Lctb008479 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 5 Aug 2013 07:21:38 GMT Received: from abhmt106.oracle.com (abhmt106.oracle.com [141.146.116.58]) by userz7022.oracle.com (8.14.4+Sun/8.14.4) with ESMTP id r757Lcc3008459; Mon, 5 Aug 2013 07:21:38 GMT Received: from [192.168.1.102] (/117.79.232.230) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Mon, 05 Aug 2013 00:21:37 -0700 Message-ID: <51FF527F.7080904@oracle.com> Date: Mon, 05 Aug 2013 15:21:35 +0800 From: Zhenzhong Duan Reply-To: zhenzhong.duan@oracle.com Organization: oracle User-Agent: Mozilla/5.0 (Windows NT 5.1; rv:17.0) Gecko/20130620 Thunderbird/17.0.7 MIME-Version: 1.0 To: "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , xen-devel CC: Bjorn Helgaas , Konrad Rzeszutek Wilk , Feng Jin , Sucheta Chakraborty Subject: [PATCH 2/3 v2] Refactor msi/msix restore code Part2 X-Source-IP: ucsinet22.oracle.com [156.151.31.94] Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org xen_initdom_restore_msi_irqs trigger a hypercall to restore addr/data/mask in dom0. It's better to do the same in default_restore_msi_irqs for baremetal. Move restore of mask in default_restore_msi_irqs, this could avoid mask restored twice in dom0, and the logic for baremetal keep same. First mask restore is in xen_initdom_restore_msi_irqs->PHYSDEVOP_restore_msi, Second restore is __pci_restore_msix_state->msix_mask_irq. Mask bits are under full control of xen, and the entry->masked in dom0 kernel is invalid. restore an invalid value to mask register could mask the msix interrupt. Without fix, qlcnic driver calling pci_reset_function will lost interrupt in dom0. Tested-by: Sucheta Chakraborty Signed-off-by: Zhenzhong Duan --- drivers/pci/msi.c | 17 ++++++++++++++--- 1 files changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 87223ae..922fb49 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -216,6 +216,8 @@ void unmask_msi_irq(struct irq_data *data) #ifdef HAVE_DEFAULT_MSI_RESTORE_IRQS void default_restore_msi_irqs(struct pci_dev *dev, int irq) { + int pos; + u16 control; struct msi_desc *entry; entry = NULL; @@ -228,8 +230,19 @@ void default_restore_msi_irqs(struct pci_dev *dev, int irq) entry = irq_get_msi_desc(irq); } - if (entry) + if (entry) { write_msi_msg(irq, &entry->msg); + if (dev->msix_enabled) { + msix_mask_irq(entry, entry->masked); + readl(entry->mask_base); + } else { + pos = entry->msi_attrib.pos; + pci_read_config_word(dev, pos + PCI_MSI_FLAGS, + &control); + msi_mask_irq(entry, msi_capable_mask(control), + entry->masked); + } + } } #endif @@ -406,7 +419,6 @@ static void __pci_restore_msi_state(struct pci_dev *dev) arch_restore_msi_irqs(dev, dev->irq); pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control); - msi_mask_irq(entry, msi_capable_mask(control), entry->masked); control &= ~PCI_MSI_FLAGS_QSIZE; control |= (entry->msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE; pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control); @@ -430,7 +442,6 @@ static void __pci_restore_msix_state(struct pci_dev *dev) list_for_each_entry(entry, &dev->msi_list, list) { arch_restore_msi_irqs(dev, entry->irq); - msix_mask_irq(entry, entry->masked); } control &= ~PCI_MSIX_FLAGS_MASKALL;