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Tue, 9 Jan 2024 19:07:39 -0800 Received: from drhqmail202.nvidia.com (10.126.190.181) by drhqmail201.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Tue, 9 Jan 2024 19:07:39 -0800 Received: from vidyas-desktop.nvidia.com (10.127.8.9) by mail.nvidia.com (10.126.190.181) with Microsoft SMTP Server id 15.2.986.41 via Frontend Transport; Tue, 9 Jan 2024 19:07:35 -0800 From: Vidya Sagar To: , , , , , , , CC: , , , , , , , , , Subject: [PATCH V2 1/2] dt-bindings: Add PCIe "preserve-boot-config" property Date: Wed, 10 Jan 2024 08:37:24 +0530 Message-ID: <20240110030725.710547-2-vidyas@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240110030725.710547-1-vidyas@nvidia.com> References: <20240110030725.710547-1-vidyas@nvidia.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099DF:EE_|BL3PR12MB6642:EE_ X-MS-Office365-Filtering-Correlation-Id: 8eb49b61-23b1-40eb-6b2f-08dc11895825 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Jan 2024 03:07:56.5556 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8eb49b61-23b1-40eb-6b2f-08dc11895825 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099DF.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL3PR12MB6642 The existing "linux,pci-probe-only" property applies at a system level and it is not possible to selectively convey individual host bridge's requirement w.r.t preserving the boot configuration done by the platform firmware to the kernel. "preserve-boot-config" addresses that concern and can be used to preserve the boot configuration for host bridges selectivey. Signed-off-by: Vidya Sagar --- V2: * None Documentation/devicetree/bindings/pci/pci.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt index 6a8f2874a24d..0a5ff998cbe8 100644 --- a/Documentation/devicetree/bindings/pci/pci.txt +++ b/Documentation/devicetree/bindings/pci/pci.txt @@ -32,6 +32,10 @@ driver implementation may support the following properties: root port to downstream device and host bridge drivers can do programming which depends on CLKREQ signal existence. For example, programming root port not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal. +- preserve-boot-config: + If present this property specifies that this host bridge is already + configured by the platform firmware and the OS doesn't need to reconfigure + it again. PCI-PCI Bridge properties -------------------------