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[85.226.240.245]) by smtp.gmail.com with ESMTPSA id h25-20020a0565123c9900b00507ae0a5eb7sm298884lfv.164.2023.10.27.07.56.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Oct 2023 07:56:17 -0700 (PDT) Received: by flawful.org (Postfix, from userid 112) id 15F6A19B2; Fri, 27 Oct 2023 16:56:15 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1698418576; bh=6UnZvJRrh1AoUKtr6mVyn3oQj+djhtctUE/QsFPE5cs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fjhkqJFkEAeYtj6dNKo7hgRpMTgAv1vWAXJ/ds+l4ZA5ha9K8LK/MMI+afdep+590 6NRBY59KuaeQhUPbJk+AttkO5tbnU67wunvxa6nN6Jn0Qv7WgQiuGayL6fRTMr+fXQ lOFzpO91s/h9EVr4H7aOvdGZVRZBFITceizAcrr8= X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Spam-Level: X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 Received: from x1-carbon.lan (OpenWrt.lan [192.168.1.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by flawful.org (Postfix) with ESMTPSA id 92C0419D7; Fri, 27 Oct 2023 16:54:43 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=flawful.org; s=mail; t=1698418483; bh=6UnZvJRrh1AoUKtr6mVyn3oQj+djhtctUE/QsFPE5cs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lqrlxN5jVho1AeBHC/T1nbkQkcNtvX+lcvdQNu45g6aLSaNux2zCMnKfiq+aJbBT9 gSl/XwR/ILy8unrb81ikiCPzcT86l0fpMe7eLIvniwTpVWDEhY9WyG7uT/VQevivwK 6t/0jeg5rwt4jQ0FYOenYiIzvNDN07G+5W2tFla4= From: Niklas Cassel To: Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Shawn Lin , Simon Xue Cc: Damien Le Moal , Sebastian Reichel , Serge Semin , Niklas Cassel , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v3 2/6] dt-bindings: PCI: dwc: rockchip: Add optional dma interrupts Date: Fri, 27 Oct 2023 16:54:14 +0200 Message-ID: <20231027145422.40265-3-nks@flawful.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231027145422.40265-1-nks@flawful.org> References: <20231027145422.40265-1-nks@flawful.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Niklas Cassel Even though rockchip-dw-pcie.yaml inherits snps,dw-pcie.yaml using: allOf: - $ref: /schemas/pci/snps,dw-pcie.yaml# and snps,dw-pcie.yaml does have the dma interrupts defined, in order to be able to use these interrupts, while still making sure 'make CHECK_DTBS=y' pass, we need to add these interrupts to rockchip-dw-pcie.yaml. These dedicated interrupts for the eDMA are not always wired to all the PCIe controllers on the same SoC. In other words, even for a specific compatible, e.g. rockchip,rk3588-pcie, these dedicated eDMA interrupts may or may not be wired. Signed-off-by: Niklas Cassel Reviewed-by: Rob Herring --- .../bindings/pci/rockchip-dw-pcie.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 6ca87ff4ae20..7ad6e1283784 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -63,6 +63,7 @@ properties: - const: pipe interrupts: + minItems: 5 items: - description: Combined system interrupt, which is used to signal the following @@ -86,14 +87,31 @@ properties: interrupts - aer_rc_err, aer_rc_err_msi, rx_cpl_timeout, tx_cpl_timeout, cor_err_sent, nf_err_sent, f_err_sent, cor_err_rx, nf_err_rx, f_err_rx, radm_qoverflow + - description: + Indicates that the eDMA Tx/Rx transfer is complete or that an + error has occurred on the corresponding channel. + - description: + Indicates that the eDMA Tx/Rx transfer is complete or that an + error has occurred on the corresponding channel. + - description: + Indicates that the eDMA Tx/Rx transfer is complete or that an + error has occurred on the corresponding channel. + - description: + Indicates that the eDMA Tx/Rx transfer is complete or that an + error has occurred on the corresponding channel. interrupt-names: + minItems: 5 items: - const: sys - const: pmc - const: msg - const: legacy - const: err + - const: dma0 + - const: dma1 + - const: dma2 + - const: dma3 legacy-interrupt-controller: description: Interrupt controller node for handling legacy PCI interrupts.