diff mbox series

[v16,03/22] PCI: Add INTx Mechanism Messages macros

Message ID 20230510062234.201499-4-yoshihiro.shimoda.uh@renesas.com
State New
Headers show
Series PCI: rcar-gen4: Add R-Car Gen4 PCIe support | expand

Commit Message

Yoshihiro Shimoda May 10, 2023, 6:22 a.m. UTC
Add "Message Routing" and "INTx Mechanism Messages" macros to send
a message by a PCIe driver.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 drivers/pci/pci.h | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

Comments

Serge Semin June 4, 2023, 11:07 p.m. UTC | #1
On Wed, May 10, 2023 at 03:22:15PM +0900, Yoshihiro Shimoda wrote:
> Add "Message Routing" and "INTx Mechanism Messages" macros to send
> a message by a PCIe driver.
> 
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> ---
>  drivers/pci/pci.h | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> index 2475098f6518..67badc40e90b 100644
> --- a/drivers/pci/pci.h
> +++ b/drivers/pci/pci.h
> @@ -11,6 +11,24 @@
>  
>  #define PCI_VSEC_ID_INTEL_TBT	0x1234	/* Thunderbolt */
>  

> +/* Message Routing */

Call it "Implicit Message Routing (r[2:0])" as per the specification.

> +#define PCI_MSG_ROUTING_RC	0
> +#define PCI_MSG_ROUTING_ADDR	1
> +#define PCI_MSG_ROUTING_ID	2
> +#define PCI_MSG_ROUTING_BC	3
> +#define PCI_MSG_ROUTING_LOCAL	4
> +#define PCI_MSG_ROUTING_GATHER	5

IMO prefix like this PCI_MSG_TYPE_R_{RC,ADDR,ID,BC,...} would be a bit
better since it would indicate that this routing flags are a sub-field of
the Message Type field. Bjorn?

> +
> +/* INTx Mechanism Messages */
> +#define PCI_CODE_ASSERT_INTA	0x20
> +#define PCI_CODE_ASSERT_INTB	0x21
> +#define PCI_CODE_ASSERT_INTC	0x22
> +#define PCI_CODE_ASSERT_INTD	0x23
> +#define PCI_CODE_DEASSERT_INTA	0x24
> +#define PCI_CODE_DEASSERT_INTB	0x25
> +#define PCI_CODE_DEASSERT_INTC	0x26
> +#define PCI_CODE_DEASSERT_INTD	0x27

IMO Prefix PCI_MSG_CODE_... would be a bit more descriptive since per
the specification the respective message field is called "Message
Code" and not just "Code". Bjorn?

-Serge(y)

> +
>  extern const unsigned char pcie_link_speed[];
>  extern bool pci_early_dump;
>  
> -- 
> 2.25.1
>
Yoshihiro Shimoda June 5, 2023, 2:10 a.m. UTC | #2
Hello Serge,

> From: Serge Semin, Sent: Monday, June 5, 2023 8:08 AM
> 
> On Wed, May 10, 2023 at 03:22:15PM +0900, Yoshihiro Shimoda wrote:
> > Add "Message Routing" and "INTx Mechanism Messages" macros to send
> > a message by a PCIe driver.
> >
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > ---
> >  drivers/pci/pci.h | 18 ++++++++++++++++++
> >  1 file changed, 18 insertions(+)
> >
> > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> > index 2475098f6518..67badc40e90b 100644
> > --- a/drivers/pci/pci.h
> > +++ b/drivers/pci/pci.h
> > @@ -11,6 +11,24 @@
> >
> >  #define PCI_VSEC_ID_INTEL_TBT	0x1234	/* Thunderbolt */
> >
> 
> > +/* Message Routing */
> 
> Call it "Implicit Message Routing (r[2:0])" as per the specification.

I got it.

> > +#define PCI_MSG_ROUTING_RC	0
> > +#define PCI_MSG_ROUTING_ADDR	1
> > +#define PCI_MSG_ROUTING_ID	2
> > +#define PCI_MSG_ROUTING_BC	3
> > +#define PCI_MSG_ROUTING_LOCAL	4
> > +#define PCI_MSG_ROUTING_GATHER	5
> 
> IMO prefix like this PCI_MSG_TYPE_R_{RC,ADDR,ID,BC,...} would be a bit
> better since it would indicate that this routing flags are a sub-field of
> the Message Type field. Bjorn?

I got it. I'll rename them.

> > +
> > +/* INTx Mechanism Messages */
> > +#define PCI_CODE_ASSERT_INTA	0x20
> > +#define PCI_CODE_ASSERT_INTB	0x21
> > +#define PCI_CODE_ASSERT_INTC	0x22
> > +#define PCI_CODE_ASSERT_INTD	0x23
> > +#define PCI_CODE_DEASSERT_INTA	0x24
> > +#define PCI_CODE_DEASSERT_INTB	0x25
> > +#define PCI_CODE_DEASSERT_INTC	0x26
> > +#define PCI_CODE_DEASSERT_INTD	0x27
> 
> IMO Prefix PCI_MSG_CODE_... would be a bit more descriptive since per
> the specification the respective message field is called "Message
> Code" and not just "Code". Bjorn?

I got it. I'll rename them.

Best regards,
Yoshihiro Shimoda

> -Serge(y)
> 
> > +
> >  extern const unsigned char pcie_link_speed[];
> >  extern bool pci_early_dump;
> >
> > --
> > 2.25.1
> >
Serge Semin June 5, 2023, 7:24 a.m. UTC | #3
On Mon, Jun 05, 2023 at 02:10:14AM +0000, Yoshihiro Shimoda wrote:
> Hello Serge,
> 
> > From: Serge Semin, Sent: Monday, June 5, 2023 8:08 AM
> > 
> > On Wed, May 10, 2023 at 03:22:15PM +0900, Yoshihiro Shimoda wrote:
> > > Add "Message Routing" and "INTx Mechanism Messages" macros to send
> > > a message by a PCIe driver.
> > >
> > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > > ---
> > >  drivers/pci/pci.h | 18 ++++++++++++++++++
> > >  1 file changed, 18 insertions(+)
> > >
> > > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> > > index 2475098f6518..67badc40e90b 100644
> > > --- a/drivers/pci/pci.h
> > > +++ b/drivers/pci/pci.h
> > > @@ -11,6 +11,24 @@
> > >
> > >  #define PCI_VSEC_ID_INTEL_TBT	0x1234	/* Thunderbolt */
> > >
> > 
> > > +/* Message Routing */
> > 
> > Call it "Implicit Message Routing (r[2:0])" as per the specification.
> 
> I got it.
> 
> > > +#define PCI_MSG_ROUTING_RC	0
> > > +#define PCI_MSG_ROUTING_ADDR	1
> > > +#define PCI_MSG_ROUTING_ID	2
> > > +#define PCI_MSG_ROUTING_BC	3
> > > +#define PCI_MSG_ROUTING_LOCAL	4
> > > +#define PCI_MSG_ROUTING_GATHER	5
> > 
> > IMO prefix like this PCI_MSG_TYPE_R_{RC,ADDR,ID,BC,...} would be a bit
> > better since it would indicate that this routing flags are a sub-field of
> > the Message Type field. Bjorn?
> 
> I got it. I'll rename them.
> 
> > > +
> > > +/* INTx Mechanism Messages */
> > > +#define PCI_CODE_ASSERT_INTA	0x20
> > > +#define PCI_CODE_ASSERT_INTB	0x21
> > > +#define PCI_CODE_ASSERT_INTC	0x22
> > > +#define PCI_CODE_ASSERT_INTD	0x23
> > > +#define PCI_CODE_DEASSERT_INTA	0x24
> > > +#define PCI_CODE_DEASSERT_INTB	0x25
> > > +#define PCI_CODE_DEASSERT_INTC	0x26
> > > +#define PCI_CODE_DEASSERT_INTD	0x27
> > 
> > IMO Prefix PCI_MSG_CODE_... would be a bit more descriptive since per
> > the specification the respective message field is called "Message
> > Code" and not just "Code". Bjorn?
> 
> I got it. I'll rename them.

I would suggest to wait for Bjorn' opinion about this for sometime
since the macros will be defined in the PCIe common header file.

-Serge(y)

> 
> Best regards,
> Yoshihiro Shimoda
> 
> > -Serge(y)
> > 
> > > +
> > >  extern const unsigned char pcie_link_speed[];
> > >  extern bool pci_early_dump;
> > >
> > > --
> > > 2.25.1
> > >
Yoshihiro Shimoda June 5, 2023, 7:53 a.m. UTC | #4
Hello Serge,

> From: Serge Semin, Sent: Monday, June 5, 2023 4:25 PM
> 
> On Mon, Jun 05, 2023 at 02:10:14AM +0000, Yoshihiro Shimoda wrote:
> > Hello Serge,
> >
> > > From: Serge Semin, Sent: Monday, June 5, 2023 8:08 AM
> > >
> > > On Wed, May 10, 2023 at 03:22:15PM +0900, Yoshihiro Shimoda wrote:
> > > > Add "Message Routing" and "INTx Mechanism Messages" macros to send
> > > > a message by a PCIe driver.
> > > >
> > > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > > > ---
> > > >  drivers/pci/pci.h | 18 ++++++++++++++++++
> > > >  1 file changed, 18 insertions(+)
> > > >
> > > > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> > > > index 2475098f6518..67badc40e90b 100644
> > > > --- a/drivers/pci/pci.h
> > > > +++ b/drivers/pci/pci.h
> > > > @@ -11,6 +11,24 @@
> > > >
> > > >  #define PCI_VSEC_ID_INTEL_TBT	0x1234	/* Thunderbolt */
> > > >
> > >
> > > > +/* Message Routing */
> > >
> > > Call it "Implicit Message Routing (r[2:0])" as per the specification.
> >
> > I got it.
> >
> > > > +#define PCI_MSG_ROUTING_RC	0
> > > > +#define PCI_MSG_ROUTING_ADDR	1
> > > > +#define PCI_MSG_ROUTING_ID	2
> > > > +#define PCI_MSG_ROUTING_BC	3
> > > > +#define PCI_MSG_ROUTING_LOCAL	4
> > > > +#define PCI_MSG_ROUTING_GATHER	5
> > >
> > > IMO prefix like this PCI_MSG_TYPE_R_{RC,ADDR,ID,BC,...} would be a bit
> > > better since it would indicate that this routing flags are a sub-field of
> > > the Message Type field. Bjorn?
> >
> > I got it. I'll rename them.
> >
> > > > +
> > > > +/* INTx Mechanism Messages */
> > > > +#define PCI_CODE_ASSERT_INTA	0x20
> > > > +#define PCI_CODE_ASSERT_INTB	0x21
> > > > +#define PCI_CODE_ASSERT_INTC	0x22
> > > > +#define PCI_CODE_ASSERT_INTD	0x23
> > > > +#define PCI_CODE_DEASSERT_INTA	0x24
> > > > +#define PCI_CODE_DEASSERT_INTB	0x25
> > > > +#define PCI_CODE_DEASSERT_INTC	0x26
> > > > +#define PCI_CODE_DEASSERT_INTD	0x27
> > >
> > > IMO Prefix PCI_MSG_CODE_... would be a bit more descriptive since per
> > > the specification the respective message field is called "Message
> > > Code" and not just "Code". Bjorn?
> >
> > I got it. I'll rename them.
> 
> I would suggest to wait for Bjorn' opinion about this for sometime
> since the macros will be defined in the PCIe common header file.

I got it. I will also wait for Bjorn's opinion.

Best regards,
Yoshihiro Shimoda

> -Serge(y)
> 
> >
> > Best regards,
> > Yoshihiro Shimoda
> >
> > > -Serge(y)
> > >
> > > > +
> > > >  extern const unsigned char pcie_link_speed[];
> > > >  extern bool pci_early_dump;
> > > >
> > > > --
> > > > 2.25.1
> > > >
diff mbox series

Patch

diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 2475098f6518..67badc40e90b 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -11,6 +11,24 @@ 
 
 #define PCI_VSEC_ID_INTEL_TBT	0x1234	/* Thunderbolt */
 
+/* Message Routing */
+#define PCI_MSG_ROUTING_RC	0
+#define PCI_MSG_ROUTING_ADDR	1
+#define PCI_MSG_ROUTING_ID	2
+#define PCI_MSG_ROUTING_BC	3
+#define PCI_MSG_ROUTING_LOCAL	4
+#define PCI_MSG_ROUTING_GATHER	5
+
+/* INTx Mechanism Messages */
+#define PCI_CODE_ASSERT_INTA	0x20
+#define PCI_CODE_ASSERT_INTB	0x21
+#define PCI_CODE_ASSERT_INTC	0x22
+#define PCI_CODE_ASSERT_INTD	0x23
+#define PCI_CODE_DEASSERT_INTA	0x24
+#define PCI_CODE_DEASSERT_INTB	0x25
+#define PCI_CODE_DEASSERT_INTC	0x26
+#define PCI_CODE_DEASSERT_INTD	0x27
+
 extern const unsigned char pcie_link_speed[];
 extern bool pci_early_dump;