diff mbox series

[4/4] dt-bindings: PCI: Note the use of pci-host-smc-generic

Message ID 20220725163905.2024437-5-jeremy.linton@arm.com
State New
Headers show
Series PCI SMC conduit, now with DT support | expand

Commit Message

Jeremy Linton July 25, 2022, 4:39 p.m. UTC
Note the addition of pci-host-smc-generic for
firmware based config assistance, and the relaxation
of the 'reg' property for such machines.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
---
 .../bindings/pci/host-generic-pci.yaml        | 24 ++++++++++++++-----
 1 file changed, 18 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
index 6bcaa8f2c3cf..b4471617fa46 100644
--- a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
+++ b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
@@ -18,10 +18,11 @@  description: |
   presenting a set of fixed windows describing a subset of IO, Memory and
   Configuration Spaces.
 
-  Configuration Space is assumed to be memory-mapped (as opposed to being
-  accessed via an ioport) and laid out with a direct correspondence to the
-  geography of a PCI bus address by concatenating the various components to
-  form an offset.
+  Configuration Space is assumed to be laid out with a direct correspondence
+  to the geography of a PCI bus address by concatenating the various components
+  to form an offset. The CAM and ECAM mechanisms require a memory mapped
+  interface, while the SMC traps to the firmware to perform config space
+  reads and writes decoded similarly to the ECAM mapping.
 
   For CAM, this 24-bit offset is:
 
@@ -86,6 +87,7 @@  properties:
         enum:
           - pci-host-cam-generic
           - pci-host-ecam-generic
+          - pci-host-smc-generic
 
   reg:
     description:
@@ -93,7 +95,8 @@  properties:
       bus. The base address corresponds to the first bus in the "bus-range"
       property. If no "bus-range" is specified, this will be bus 0 (the
       default). Some host controllers have a 2nd non-compliant address range,
-      so 2 entries are allowed.
+      so 2 entries are allowed. Machines which implement the Arm PCI SMCCC spec
+      must not provide this property.
     minItems: 1
     maxItems: 2
 
@@ -109,7 +112,6 @@  properties:
 
 required:
   - compatible
-  - reg
   - ranges
 
 allOf:
@@ -123,6 +125,16 @@  allOf:
       required:
         - dma-coherent
 
+  - if:
+      properties:
+        compatible:
+          not:
+            contains:
+              const: pci-host-smc-generic
+    then:
+      required:
+        - reg
+
   - if:
       properties:
         compatible: