From patchwork Fri Apr 22 11:48:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 1620780 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=nAgD41oz; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4KlCNl31Kvz9s0B for ; Fri, 22 Apr 2022 21:48:55 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1447183AbiDVLvp (ORCPT ); Fri, 22 Apr 2022 07:51:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52140 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1447177AbiDVLvp (ORCPT ); Fri, 22 Apr 2022 07:51:45 -0400 Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 57D8B56419 for ; Fri, 22 Apr 2022 04:48:51 -0700 (PDT) Received: by mail-lf1-x134.google.com with SMTP id y32so13842056lfa.6 for ; Fri, 22 Apr 2022 04:48:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UDhnRNr6hiHo71KkhK/f8RMBYfiEW0Irg/wIm1rc3S4=; b=nAgD41ozm+02m77nlItdjfYJsjYobcViHxdlMaUGgc7w35WRj50Rp8WuIjRAxhYQ3p rsthnXu7dz3WwYPVgQvfKegwAIv1NbkWfpksb9k35Qv88mPlOkNYPi32bhFN+LOQnHxA dxHTjTa27Bh0VPB9FBNSvAW3YX3RCAQviyM4GIlTND8Bx/Ptl+gX3a15pLQmw34kl6JW NrLmqXIRfJskCqSlrlX1+k77dbso9/L0iFKPKsVOlJz1NNIEPXnomR7lkw91q4KO70cc /J8q+9zkmC9GkS7Zitu19/NRtAywRQcS4xVSu6g7hP+dMlov/m2IG4vHIzRBRKvDiFhA LCSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UDhnRNr6hiHo71KkhK/f8RMBYfiEW0Irg/wIm1rc3S4=; b=mmr5MtKmmI/03vsLercRj3sogTtbiNeK58jP7dvFYXi2Bl3bXnizbuqkpxeLmJVXiB NXkLpQXePGNORAsru79VCslAR+RTpoKPp7ZOdzdnBe6ktLS6Ohfopz7zXpkaVODSEM9K w45tV4rAwgFT6SzC2lJqZU9mdSZZe3fVS7RMid9MhBkEMl9OQk5tt7398wbtI9JR2fXw 8Yk8kHLLa969rh5U7ss+d0f1hRHpMpwSBWR9knHo3acvihTnzbjCoZiC6atdmrWD8QLx LRakajOncJy4xpWIKurDcMN3CqMnoT/gCT+4CeE7baBtkURT1dY5OEdfmp/vjTVFpXVo aqPw== X-Gm-Message-State: AOAM5309jU2Tkvtvkxvz9+p6gZFhvUIwNDN407ALcGvZixNpXrYkICFX KpjMBwCJ/d1na2DjI3yOde6zPw== X-Google-Smtp-Source: ABdhPJwDSCX74YBddDyixukkI7/dtWqBjDSg/eP8Dg1V/+uNdndjUpnsviLWwJ/7TkBe+HyrZIMO6w== X-Received: by 2002:a05:6512:b18:b0:44a:9a1f:dcf6 with SMTP id w24-20020a0565120b1800b0044a9a1fdcf6mr2834947lfu.4.1650628129650; Fri, 22 Apr 2022 04:48:49 -0700 (PDT) Received: from eriador.lumag.spb.ru ([188.162.65.189]) by smtp.gmail.com with ESMTPSA id h7-20020a19ca47000000b0047014ca10f2sm200695lfj.8.2022.04.22.04.48.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 04:48:49 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Stanimir Varbanov Cc: Bjorn Helgaas , Vinod Koul , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 5/6] arm64: dts: qcom: stop using snps,dw-pcie falback Date: Fri, 22 Apr 2022 14:48:40 +0300 Message-Id: <20220422114841.1854138-6-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422114841.1854138-1-dmitry.baryshkov@linaro.org> References: <20220422114841.1854138-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Qualcomm PCIe devices are not really compatible with the snps,dw-pcie. Unlike the generic IP core, they have special requirements regarding enabling clocks, toggling resets, using the PHY, etc. This is not to mention that platform snps-dw-pcie driver expects to find two IRQs declared, while Qualcomm platforms use just one. Signed-off-by: Dmitry Baryshkov Acked-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 +++--- arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 +++--- 4 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index f0f81c23c16f..b577b9046938 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1574,7 +1574,7 @@ agnoc@0 { ranges; pcie0: pcie@600000 { - compatible = "qcom,pcie-msm8996", "snps,dw-pcie"; + compatible = "qcom,pcie-msm8996"; status = "disabled"; power-domains = <&gcc PCIE0_GDSC>; bus-range = <0x00 0xff>; @@ -1626,7 +1626,7 @@ pcie0: pcie@600000 { }; pcie1: pcie@608000 { - compatible = "qcom,pcie-msm8996", "snps,dw-pcie"; + compatible = "qcom,pcie-msm8996"; power-domains = <&gcc PCIE1_GDSC>; bus-range = <0x00 0xff>; num-lanes = <1>; @@ -1679,7 +1679,7 @@ pcie1: pcie@608000 { }; pcie2: pcie@610000 { - compatible = "qcom,pcie-msm8996", "snps,dw-pcie"; + compatible = "qcom,pcie-msm8996"; power-domains = <&gcc PCIE2_GDSC>; bus-range = <0x00 0xff>; num-lanes = <1>; diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 3f06f7cd3cf2..2386081463e3 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -1280,7 +1280,7 @@ glink-edge { }; pcie: pci@10000000 { - compatible = "qcom,pcie-qcs404", "snps,dw-pcie"; + compatible = "qcom,pcie-qcs404"; reg = <0x10000000 0xf1d>, <0x10000f20 0xa8>, <0x07780000 0x2000>, diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index b31bf62e8680..85dfa0842003 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2027,7 +2027,7 @@ llcc: system-cache-controller@1100000 { }; pcie0: pci@1c00000 { - compatible = "qcom,pcie-sdm845", "snps,dw-pcie"; + compatible = "qcom,pcie-sdm845"; reg = <0 0x01c00000 0 0x2000>, <0 0x60000000 0 0xf1d>, <0 0x60000f20 0 0xa8>, @@ -2132,7 +2132,7 @@ pcie0_lane: phy@1c06200 { }; pcie1: pci@1c08000 { - compatible = "qcom,pcie-sdm845", "snps,dw-pcie"; + compatible = "qcom,pcie-sdm845"; reg = <0 0x01c08000 0 0x2000>, <0 0x40000000 0 0xf1d>, <0 0x40000f20 0 0xa8>, diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index af8f22636436..410272a1e19b 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1789,7 +1789,7 @@ mmss_noc: interconnect@1740000 { }; pcie0: pci@1c00000 { - compatible = "qcom,pcie-sm8250", "snps,dw-pcie"; + compatible = "qcom,pcie-sm8250"; reg = <0 0x01c00000 0 0x3000>, <0 0x60000000 0 0xf1d>, <0 0x60000f20 0 0xa8>, @@ -1888,7 +1888,7 @@ pcie0_lane: phy@1c06200 { }; pcie1: pci@1c08000 { - compatible = "qcom,pcie-sm8250", "snps,dw-pcie"; + compatible = "qcom,pcie-sm8250"; reg = <0 0x01c08000 0 0x3000>, <0 0x40000000 0 0xf1d>, <0 0x40000f20 0 0xa8>, @@ -1994,7 +1994,7 @@ pcie1_lane: phy@1c0e200 { }; pcie2: pci@1c10000 { - compatible = "qcom,pcie-sm8250", "snps,dw-pcie"; + compatible = "qcom,pcie-sm8250"; reg = <0 0x01c10000 0 0x3000>, <0 0x64000000 0 0xf1d>, <0 0x64000f20 0 0xa8>,