From patchwork Fri Jun 25 09:03:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 1497064 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=ntVClOhH; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4GBB0q2Vqwz9sV8 for ; Fri, 25 Jun 2021 19:05:15 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230526AbhFYJHd (ORCPT ); Fri, 25 Jun 2021 05:07:33 -0400 Received: from mail.kernel.org ([198.145.29.99]:57980 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230490AbhFYJHb (ORCPT ); Fri, 25 Jun 2021 05:07:31 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 6B7D461431; Fri, 25 Jun 2021 09:05:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1624611911; bh=Pbrm1uRTSvRmcoLNtqhDtj7irFXEs2zlkumxeogs/Ks=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ntVClOhHsHumuEoNFfmTKiKy31pCihbGzn7VBndYbYRAT4+DARIUGMoceuU7bllzY 1MgEH6fleICmwDueWtbAuaS9nC5WSAF5iblBMe6qdDn+cxa0oeihI1yOD70Vz0AQ51 YIPsTWccI/2leiIt/aNMrGlNTC5Rl+yBppzl9QkFDvZXP+JNzQbHsFJkmAzYDEcJyi U6yvYttaGJqKmmjM+R3MCgNehJaJ+OjnaQmBpA9JQTnw/WYUaxHj9PCBaV6XUnlt6u 5PyWKRMuUEwjNs594L6u+cJeBnFwndyusSjqZIFjFeLR+YpknsRkzWJnhRkmcDpTTx xNTSGOl38gNzA== Received: by pali.im (Postfix) id 8AA28A7D; Fri, 25 Jun 2021 11:05:09 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Lorenzo Pieralisi , Thomas Petazzoni , Bjorn Helgaas , Rob Herring Cc: =?utf-8?q?Marek_Beh=C3=BAn?= , Marc Zyngier , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/7] PCI: aardvark: Do not touch status bits of masked interrupts in interrupt handler Date: Fri, 25 Jun 2021 11:03:13 +0200 Message-Id: <20210625090319.10220-2-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210625090319.10220-1-pali@kernel.org> References: <20210625090319.10220-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org It is incorrect to clear status bits of masked interrupts. The aardvark driver clears all status interrupt bits when no unmasked status bit was set. When some unmasked bit was set then masked bits were not cleared. Fix this so that masked bits are never cleared. Signed-off-by: Pali Rohár Reviewed-by: Marek Behún Cc: stable@vger.kernel.org --- drivers/pci/controller/pci-aardvark.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index d4215da17a59..36fcc077ec72 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -1210,11 +1210,8 @@ static void advk_pcie_handle_int(struct advk_pcie *pcie) isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG); isr1_status = isr1_val & ((~isr1_mask) & PCIE_ISR1_ALL_MASK); - if (!isr0_status && !isr1_status) { - advk_writel(pcie, isr0_val, PCIE_ISR0_REG); - advk_writel(pcie, isr1_val, PCIE_ISR1_REG); + if (!isr0_status && !isr1_status) return; - } /* Process MSI interrupts */ if (isr0_status & PCIE_ISR0_MSI_INT_PENDING)