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[v11,02/16] PCI/RCEC: Add RCEC class code and extended capability

Message ID 20201117191954.1322844-3-sean.v.kelley@intel.com
State New
Headers show
Series Add RCEC handling to PCI/AER | expand

Commit Message

Kelley, Sean V Nov. 17, 2020, 7:19 p.m. UTC
From: Qiuxu Zhuo <qiuxu.zhuo@intel.com>

A PCIe Root Complex Event Collector (RCEC) has base class 0x08, sub-class
0x07, and programming interface 0x00.  Add the class code 0x0807 to
identify RCEC devices and add #defines for the RCEC Endpoint Association
Extended Capability.

See PCIe r5.0, sec 1.3.4 ("Root Complex Event Collector") and sec 7.9.10
("Root Complex Event Collector Endpoint Association Extended Capability").

Link: https://lore.kernel.org/r/20201002184735.1229220-2-seanvk.dev@oregontracks.org
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
 include/linux/pci_ids.h       | 1 +
 include/uapi/linux/pci_regs.h | 7 +++++++
 2 files changed, 8 insertions(+)

Comments

Kuppuswamy, Sathyanarayanan Nov. 17, 2020, 8:07 p.m. UTC | #1
Hi,

On 11/17/20 11:19 AM, Sean V Kelley wrote:
> From: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
> 
> A PCIe Root Complex Event Collector (RCEC) has base class 0x08, sub-class
> 0x07, and programming interface 0x00.  Add the class code 0x0807 to
> identify RCEC devices and add #defines for the RCEC Endpoint Association
> Extended Capability.
> 
> See PCIe r5.0, sec 1.3.4 ("Root Complex Event Collector") and sec 7.9.10
> ("Root Complex Event Collector Endpoint Association Extended Capability").
Why not merge this change with usage patch ? Keeping changes together will help
in case of reverting the code.
> 
> Link: https://lore.kernel.org/r/20201002184735.1229220-2-seanvk.dev@oregontracks.org
> Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> ---
>   include/linux/pci_ids.h       | 1 +
>   include/uapi/linux/pci_regs.h | 7 +++++++
>   2 files changed, 8 insertions(+)
> 
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index 1ab1e24bcbce..d8156a5dbee8 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -81,6 +81,7 @@
>   #define PCI_CLASS_SYSTEM_RTC		0x0803
>   #define PCI_CLASS_SYSTEM_PCI_HOTPLUG	0x0804
>   #define PCI_CLASS_SYSTEM_SDHCI		0x0805
> +#define PCI_CLASS_SYSTEM_RCEC		0x0807
>   #define PCI_CLASS_SYSTEM_OTHER		0x0880
>   
>   #define PCI_BASE_CLASS_INPUT		0x09
> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
> index a95d55f9f257..bccd3e35cb65 100644
> --- a/include/uapi/linux/pci_regs.h
> +++ b/include/uapi/linux/pci_regs.h
> @@ -831,6 +831,13 @@
>   #define  PCI_PWR_CAP_BUDGET(x)	((x) & 1)	/* Included in system budget */
>   #define PCI_EXT_CAP_PWR_SIZEOF	16
>   
> +/* Root Complex Event Collector Endpoint Association  */
> +#define PCI_RCEC_RCIEP_BITMAP	4	/* Associated Bitmap for RCiEPs */
> +#define PCI_RCEC_BUSN		8	/* RCEC Associated Bus Numbers */
> +#define  PCI_RCEC_BUSN_REG_VER	0x02	/* Least version with BUSN present */
> +#define  PCI_RCEC_BUSN_NEXT(x)	(((x) >> 8) & 0xff)
> +#define  PCI_RCEC_BUSN_LAST(x)	(((x) >> 16) & 0xff)
> +
>   /* Vendor-Specific (VSEC, PCI_EXT_CAP_ID_VNDR) */
>   #define PCI_VNDR_HEADER		4	/* Vendor-Specific Header */
>   #define  PCI_VNDR_HEADER_ID(x)	((x) & 0xffff)
>
Kelley, Sean V Nov. 17, 2020, 10:39 p.m. UTC | #2
Hi Sathya,

Thanks for reviewing

> On Nov 17, 2020, at 12:07 PM, Kuppuswamy, Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> wrote:
> 
> Hi,
> 
> On 11/17/20 11:19 AM, Sean V Kelley wrote:
>> From: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
>> A PCIe Root Complex Event Collector (RCEC) has base class 0x08, sub-class
>> 0x07, and programming interface 0x00.  Add the class code 0x0807 to
>> identify RCEC devices and add #defines for the RCEC Endpoint Association
>> Extended Capability.
>> See PCIe r5.0, sec 1.3.4 ("Root Complex Event Collector") and sec 7.9.10
>> ("Root Complex Event Collector Endpoint Association Extended Capability").
> Why not merge this change with usage patch ? Keeping changes together will help
> in case of reverting the code.

These are spec derived values that have been absent until now.   They could be combined with usage.

Sean



>> Link: https://lore.kernel.org/r/20201002184735.1229220-2-seanvk.dev@oregontracks.org
>> Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
>> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
>> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>> ---
>>  include/linux/pci_ids.h       | 1 +
>>  include/uapi/linux/pci_regs.h | 7 +++++++
>>  2 files changed, 8 insertions(+)
>> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
>> index 1ab1e24bcbce..d8156a5dbee8 100644
>> --- a/include/linux/pci_ids.h
>> +++ b/include/linux/pci_ids.h
>> @@ -81,6 +81,7 @@
>>  #define PCI_CLASS_SYSTEM_RTC		0x0803
>>  #define PCI_CLASS_SYSTEM_PCI_HOTPLUG	0x0804
>>  #define PCI_CLASS_SYSTEM_SDHCI		0x0805
>> +#define PCI_CLASS_SYSTEM_RCEC		0x0807
>>  #define PCI_CLASS_SYSTEM_OTHER		0x0880
>>    #define PCI_BASE_CLASS_INPUT		0x09
>> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
>> index a95d55f9f257..bccd3e35cb65 100644
>> --- a/include/uapi/linux/pci_regs.h
>> +++ b/include/uapi/linux/pci_regs.h
>> @@ -831,6 +831,13 @@
>>  #define  PCI_PWR_CAP_BUDGET(x)	((x) & 1)	/* Included in system budget */
>>  #define PCI_EXT_CAP_PWR_SIZEOF	16
>>  +/* Root Complex Event Collector Endpoint Association  */
>> +#define PCI_RCEC_RCIEP_BITMAP	4	/* Associated Bitmap for RCiEPs */
>> +#define PCI_RCEC_BUSN		8	/* RCEC Associated Bus Numbers */
>> +#define  PCI_RCEC_BUSN_REG_VER	0x02	/* Least version with BUSN present */
>> +#define  PCI_RCEC_BUSN_NEXT(x)	(((x) >> 8) & 0xff)
>> +#define  PCI_RCEC_BUSN_LAST(x)	(((x) >> 16) & 0xff)
>> +
>>  /* Vendor-Specific (VSEC, PCI_EXT_CAP_ID_VNDR) */
>>  #define PCI_VNDR_HEADER		4	/* Vendor-Specific Header */
>>  #define  PCI_VNDR_HEADER_ID(x)	((x) & 0xffff)
> 
> -- 
> Sathyanarayanan Kuppuswamy
> Linux Kernel Developer
diff mbox series

Patch

diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 1ab1e24bcbce..d8156a5dbee8 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -81,6 +81,7 @@ 
 #define PCI_CLASS_SYSTEM_RTC		0x0803
 #define PCI_CLASS_SYSTEM_PCI_HOTPLUG	0x0804
 #define PCI_CLASS_SYSTEM_SDHCI		0x0805
+#define PCI_CLASS_SYSTEM_RCEC		0x0807
 #define PCI_CLASS_SYSTEM_OTHER		0x0880
 
 #define PCI_BASE_CLASS_INPUT		0x09
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index a95d55f9f257..bccd3e35cb65 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -831,6 +831,13 @@ 
 #define  PCI_PWR_CAP_BUDGET(x)	((x) & 1)	/* Included in system budget */
 #define PCI_EXT_CAP_PWR_SIZEOF	16
 
+/* Root Complex Event Collector Endpoint Association  */
+#define PCI_RCEC_RCIEP_BITMAP	4	/* Associated Bitmap for RCiEPs */
+#define PCI_RCEC_BUSN		8	/* RCEC Associated Bus Numbers */
+#define  PCI_RCEC_BUSN_REG_VER	0x02	/* Least version with BUSN present */
+#define  PCI_RCEC_BUSN_NEXT(x)	(((x) >> 8) & 0xff)
+#define  PCI_RCEC_BUSN_LAST(x)	(((x) >> 16) & 0xff)
+
 /* Vendor-Specific (VSEC, PCI_EXT_CAP_ID_VNDR) */
 #define PCI_VNDR_HEADER		4	/* Vendor-Specific Header */
 #define  PCI_VNDR_HEADER_ID(x)	((x) & 0xffff)