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[2/2] PCI/PM: Revert "PCI/PM: Apply D2 delay as milliseconds, not microseconds"

Message ID 20200929194748.2566828-3-helgaas@kernel.org
State New
Headers show
Series PCI/PM: Fix D2 transition delay | expand

Commit Message

Bjorn Helgaas Sept. 29, 2020, 7:47 p.m. UTC 
From: Bjorn Helgaas <bhelgaas@google.com>

This reverts commit 7e24bc347e57992d532bc2ed700209b0fc0a4bf5.

7e24bc347e57 was based on PCIe r5.0, sec 5.9, which claims we need a 200 ms
delay when transitioning to or from D2.  However, sec 5.3.1.3 states the
delay as 200 μs (microseconds), as does the table in PCIe r4.0, sec 5.9.1.

This looks like a typo in the r5.0 spec, so revert back to a 200 μs delay
instead of a 200 ms delay.

Fixes: 7e24bc347e57 ("PCI/PM: Apply D2 delay as milliseconds, not microseconds")
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/pci/pci.c | 2 +-
 drivers/pci/pci.h | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)
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Patch

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index c4a26532a447..d69578ad44a0 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1065,7 +1065,7 @@  static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state)
 	if (state == PCI_D3hot || dev->current_state == PCI_D3hot)
 		pci_dev_d3_sleep(dev);
 	else if (state == PCI_D2 || dev->current_state == PCI_D2)
-		msleep(PCI_PM_D2_DELAY);
+		udelay(PCI_PM_D2_DELAY);
 
 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
 	dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK);
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index f0a9cbe01bc7..f86cae9aa1f4 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -43,9 +43,9 @@  int pci_probe_reset_function(struct pci_dev *dev);
 int pci_bridge_secondary_bus_reset(struct pci_dev *dev);
 int pci_bus_error_reset(struct pci_dev *dev);
 
-#define PCI_PM_D2_DELAY         200
-#define PCI_PM_D3HOT_WAIT       10
-#define PCI_PM_D3COLD_WAIT      100
+#define PCI_PM_D2_DELAY         200	/* usec; see PCIe r4.0, sec 5.9.1 */
+#define PCI_PM_D3HOT_WAIT       10	/* msec */
+#define PCI_PM_D3COLD_WAIT      100	/* msec */
 
 /**
  * struct pci_platform_pm_ops - Firmware PM callbacks