diff mbox series

[PATCHv7,10/12] arm64: dts: layerscape: Add PCIe EP node for ls1088a

Message ID 20200811095441.7636-11-Zhiqiang.Hou@nxp.com
State New
Headers show
Series PCI: dwc: Add the multiple PF support for DWC and Layerscape | expand

Commit Message

Zhiqiang Hou Aug. 11, 2020, 9:54 a.m. UTC
From: Xiaowei Bao <xiaowei.bao@nxp.com>

Add PCIe EP node for ls1088a to support EP mode.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V7:
 - Rebase the patch without functionality change.

 .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 +++++++++++++++++++
 1 file changed, 31 insertions(+)

Comments

Rob Herring Sept. 10, 2020, 4:47 p.m. UTC | #1
On Tue, Aug 11, 2020 at 05:54:39PM +0800, Zhiqiang Hou wrote:
> From: Xiaowei Bao <xiaowei.bao@nxp.com>
> 
> Add PCIe EP node for ls1088a to support EP mode.
> 
> Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> V7:
>  - Rebase the patch without functionality change.
> 
>  .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 +++++++++++++++++++
>  1 file changed, 31 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> index 169f4742ae3b..915592141f1b 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> @@ -499,6 +499,17 @@
>  			status = "disabled";
>  		};
>  
> +		pcie_ep@3400000 {

pci-ep@...

> +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> +			reg = <0x00 0x03400000 0x0 0x00100000
> +			       0x20 0x00000000 0x8 0x00000000>;
> +			reg-names = "regs", "addr_space";
> +			num-ib-windows = <24>;
> +			num-ob-windows = <128>;
> +			max-functions = /bits/ 8 <2>;
> +			status = "disabled";
> +		};
> +
>  		pcie@3500000 {
>  			compatible = "fsl,ls1088a-pcie";
>  			reg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */
> @@ -525,6 +536,16 @@
>  			status = "disabled";
>  		};
>  
> +		pcie_ep@3500000 {
> +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> +			reg = <0x00 0x03500000 0x0 0x00100000
> +			       0x28 0x00000000 0x8 0x00000000>;
> +			reg-names = "regs", "addr_space";
> +			num-ib-windows = <6>;
> +			num-ob-windows = <8>;
> +			status = "disabled";
> +		};
> +
>  		pcie@3600000 {
>  			compatible = "fsl,ls1088a-pcie";
>  			reg = <0x00 0x03600000 0x0 0x00100000   /* controller registers */
> @@ -551,6 +572,16 @@
>  			status = "disabled";
>  		};
>  
> +		pcie_ep@3600000 {
> +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> +			reg = <0x00 0x03600000 0x0 0x00100000
> +			       0x30 0x00000000 0x8 0x00000000>;
> +			reg-names = "regs", "addr_space";
> +			num-ib-windows = <6>;
> +			num-ob-windows = <8>;
> +			status = "disabled";
> +		};
> +
>  		smmu: iommu@5000000 {
>  			compatible = "arm,mmu-500";
>  			reg = <0 0x5000000 0 0x800000>;
> -- 
> 2.17.1
>
Zhiqiang Hou Sept. 13, 2020, 4:26 p.m. UTC | #2
Hi Rob,

Thanks a lot for your comments!

> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: 2020年9月11日 0:48
> To: Z.q. Hou <zhiqiang.hou@nxp.com>
> Cc: linux-pci@vger.kernel.org; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linuxppc-dev@lists.ozlabs.org; bhelgaas@google.com;
> lorenzo.pieralisi@arm.com; shawnguo@kernel.org; Leo Li
> <leoyang.li@nxp.com>; kishon@ti.com; gustavo.pimentel@synopsys.com;
> Roy Zang <roy.zang@nxp.com>; jingoohan1@gmail.com;
> andrew.murray@arm.com; Mingkai Hu <mingkai.hu@nxp.com>; M.h. Lian
> <minghuan.lian@nxp.com>; Xiaowei Bao <xiaowei.bao@nxp.com>
> Subject: Re: [PATCHv7 10/12] arm64: dts: layerscape: Add PCIe EP node for
> ls1088a
> 
> On Tue, Aug 11, 2020 at 05:54:39PM +0800, Zhiqiang Hou wrote:
> > From: Xiaowei Bao <xiaowei.bao@nxp.com>
> >
> > Add PCIe EP node for ls1088a to support EP mode.
> >
> > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
> > Reviewed-by: Andrew Murray <andrew.murray@arm.com>
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> > V7:
> >  - Rebase the patch without functionality change.
> >
> >  .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31
> +++++++++++++++++++
> >  1 file changed, 31 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > index 169f4742ae3b..915592141f1b 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > @@ -499,6 +499,17 @@
> >  			status = "disabled";
> >  		};
> >
> > +		pcie_ep@3400000 {
> 
> pci-ep@...

The DT node name must be "xxx-xx" style? If yes, the LS1046A EP node also has the name "pcie_ep", it also need to be fixed.

Thanks,
Zhiqiang

> 
> > +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> > +			reg = <0x00 0x03400000 0x0 0x00100000
> > +			       0x20 0x00000000 0x8 0x00000000>;
> > +			reg-names = "regs", "addr_space";
> > +			num-ib-windows = <24>;
> > +			num-ob-windows = <128>;
> > +			max-functions = /bits/ 8 <2>;
> > +			status = "disabled";
> > +		};
> > +
> >  		pcie@3500000 {
> >  			compatible = "fsl,ls1088a-pcie";
> >  			reg = <0x00 0x03500000 0x0 0x00100000   /* controller
> registers */
> > @@ -525,6 +536,16 @@
> >  			status = "disabled";
> >  		};
> >
> > +		pcie_ep@3500000 {
> > +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> > +			reg = <0x00 0x03500000 0x0 0x00100000
> > +			       0x28 0x00000000 0x8 0x00000000>;
> > +			reg-names = "regs", "addr_space";
> > +			num-ib-windows = <6>;
> > +			num-ob-windows = <8>;
> > +			status = "disabled";
> > +		};
> > +
> >  		pcie@3600000 {
> >  			compatible = "fsl,ls1088a-pcie";
> >  			reg = <0x00 0x03600000 0x0 0x00100000   /* controller
> registers */
> > @@ -551,6 +572,16 @@
> >  			status = "disabled";
> >  		};
> >
> > +		pcie_ep@3600000 {
> > +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> > +			reg = <0x00 0x03600000 0x0 0x00100000
> > +			       0x30 0x00000000 0x8 0x00000000>;
> > +			reg-names = "regs", "addr_space";
> > +			num-ib-windows = <6>;
> > +			num-ob-windows = <8>;
> > +			status = "disabled";
> > +		};
> > +
> >  		smmu: iommu@5000000 {
> >  			compatible = "arm,mmu-500";
> >  			reg = <0 0x5000000 0 0x800000>;
> > --
> > 2.17.1
> >
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index 169f4742ae3b..915592141f1b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -499,6 +499,17 @@ 
 			status = "disabled";
 		};
 
+		pcie_ep@3400000 {
+			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
+			reg = <0x00 0x03400000 0x0 0x00100000
+			       0x20 0x00000000 0x8 0x00000000>;
+			reg-names = "regs", "addr_space";
+			num-ib-windows = <24>;
+			num-ob-windows = <128>;
+			max-functions = /bits/ 8 <2>;
+			status = "disabled";
+		};
+
 		pcie@3500000 {
 			compatible = "fsl,ls1088a-pcie";
 			reg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */
@@ -525,6 +536,16 @@ 
 			status = "disabled";
 		};
 
+		pcie_ep@3500000 {
+			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
+			reg = <0x00 0x03500000 0x0 0x00100000
+			       0x28 0x00000000 0x8 0x00000000>;
+			reg-names = "regs", "addr_space";
+			num-ib-windows = <6>;
+			num-ob-windows = <8>;
+			status = "disabled";
+		};
+
 		pcie@3600000 {
 			compatible = "fsl,ls1088a-pcie";
 			reg = <0x00 0x03600000 0x0 0x00100000   /* controller registers */
@@ -551,6 +572,16 @@ 
 			status = "disabled";
 		};
 
+		pcie_ep@3600000 {
+			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
+			reg = <0x00 0x03600000 0x0 0x00100000
+			       0x30 0x00000000 0x8 0x00000000>;
+			reg-names = "regs", "addr_space";
+			num-ib-windows = <6>;
+			num-ob-windows = <8>;
+			status = "disabled";
+		};
+
 		smmu: iommu@5000000 {
 			compatible = "arm,mmu-500";
 			reg = <0 0x5000000 0 0x800000>;