Message ID | 20190410123440.26818.67664.stgit@scvm10.sc.intel.com |
---|---|
State | Changes Requested |
Delegated to: | Bjorn Helgaas |
Headers | show |
Series | Allow drivers to configure AER registers | expand |
On Wed, Apr 10, 2019 at 05:34:50AM -0700, Dennis Dalessandro wrote: > From: Kamenee Arumugam <kamenee.arumugam@intel.com> > > In some use cases, drivers may need to change the default > AER settings. Introduce a helper function for setting > and clearing the AER configuration registers. > > Access to the AER registers is not serialized. If multiple > access is required, correct locking must be done. > FWIW, Reviewed-by: Andriy Shevchenko <andriy.shevchenko@intel.com> Thanks. > Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> > Reviewed-by: Michael J. Ruhl <michael.j.ruhl@intel.com> > Cc: Andriy Shevchenko <andriy.shevchenko@intel.com> > Signed-off-by: Kamenee Arumugam <kamenee.arumugam@intel.com> > Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> > --- > drivers/pci/pcie/aer.c | 33 +++++++++++++++++++++++++++++++++ > include/linux/aer.h | 17 +++++++++++++++++ > 2 files changed, 50 insertions(+), 0 deletions(-) > > diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c > index f8fc211..b0435f9 100644 > --- a/drivers/pci/pcie/aer.c > +++ b/drivers/pci/pcie/aer.c > @@ -353,6 +353,39 @@ int pci_enable_pcie_error_reporting(struct pci_dev *dev) > } > EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting); > > +/** > + * pcie_aer_clear_and_set_dword - Set or clear AER registers > + * @dev: pci dev data > + * @pos: The offset of AER registers > + * @clear: The bits to clear > + * @set: The bits to set > + * > + * This function must only be used by the driver owning the device. > + * Return: > + * * 0 - on success > + * * Negative error code - on generic failures > + * * Positive error code - on PCI access errors > + */ > +int pcie_aer_clear_and_set_dword(struct pci_dev *dev, int pos, > + u32 clear, u32 set) > +{ > + u32 data; > + int ret; > + > + if (!dev->aer_cap) > + return -EIO; > + > + ret = pci_read_config_dword(dev, dev->aer_cap + pos, &data); > + if (!ret) { > + data &= ~clear; > + data |= set; > + return pci_write_config_dword(dev, dev->aer_cap + pos, data); > + } > + > + return ret; > +} > +EXPORT_SYMBOL_GPL(pcie_aer_clear_and_set_dword); > + > int pci_disable_pcie_error_reporting(struct pci_dev *dev) > { > if (pcie_aer_get_firmware_first(dev)) > diff --git a/include/linux/aer.h b/include/linux/aer.h > index 514bffa..e21d65c 100644 > --- a/include/linux/aer.h > +++ b/include/linux/aer.h > @@ -46,6 +46,8 @@ struct aer_capability_regs { > int pci_disable_pcie_error_reporting(struct pci_dev *dev); > int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev); > int pci_cleanup_aer_error_status_regs(struct pci_dev *dev); > +int pcie_aer_clear_and_set_dword(struct pci_dev *dev, int pos, > + u32 clear, u32 set); > #else > static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev) > { > @@ -63,6 +65,12 @@ static inline int pci_cleanup_aer_error_status_regs(struct pci_dev *dev) > { > return -EINVAL; > } > + > +static inline int pcie_aer_clear_and_set_dword(struct pci_dev *dev, int pos, > + u32 clear, u32 set) > +{ > + return -EINVAL; > +} > #endif > > void cper_print_aer(struct pci_dev *dev, int aer_severity, > @@ -70,5 +78,14 @@ void cper_print_aer(struct pci_dev *dev, int aer_severity, > int cper_severity_to_aer(int cper_severity); > void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn, > int severity, struct aer_capability_regs *aer_regs); > +static inline int pcie_aer_set_dword(struct pci_dev *dev, int pos, u32 set) > +{ > + return pcie_aer_clear_and_set_dword(dev, pos, 0, set); > +} > + > +static inline int pcie_aer_clear_dword(struct pci_dev *dev, int pos, u32 clear) > +{ > + return pcie_aer_clear_and_set_dword(dev, pos, clear, 0); > +} > #endif //_AER_H_ > >
diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index f8fc211..b0435f9 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -353,6 +353,39 @@ int pci_enable_pcie_error_reporting(struct pci_dev *dev) } EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting); +/** + * pcie_aer_clear_and_set_dword - Set or clear AER registers + * @dev: pci dev data + * @pos: The offset of AER registers + * @clear: The bits to clear + * @set: The bits to set + * + * This function must only be used by the driver owning the device. + * Return: + * * 0 - on success + * * Negative error code - on generic failures + * * Positive error code - on PCI access errors + */ +int pcie_aer_clear_and_set_dword(struct pci_dev *dev, int pos, + u32 clear, u32 set) +{ + u32 data; + int ret; + + if (!dev->aer_cap) + return -EIO; + + ret = pci_read_config_dword(dev, dev->aer_cap + pos, &data); + if (!ret) { + data &= ~clear; + data |= set; + return pci_write_config_dword(dev, dev->aer_cap + pos, data); + } + + return ret; +} +EXPORT_SYMBOL_GPL(pcie_aer_clear_and_set_dword); + int pci_disable_pcie_error_reporting(struct pci_dev *dev) { if (pcie_aer_get_firmware_first(dev)) diff --git a/include/linux/aer.h b/include/linux/aer.h index 514bffa..e21d65c 100644 --- a/include/linux/aer.h +++ b/include/linux/aer.h @@ -46,6 +46,8 @@ struct aer_capability_regs { int pci_disable_pcie_error_reporting(struct pci_dev *dev); int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev); int pci_cleanup_aer_error_status_regs(struct pci_dev *dev); +int pcie_aer_clear_and_set_dword(struct pci_dev *dev, int pos, + u32 clear, u32 set); #else static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev) { @@ -63,6 +65,12 @@ static inline int pci_cleanup_aer_error_status_regs(struct pci_dev *dev) { return -EINVAL; } + +static inline int pcie_aer_clear_and_set_dword(struct pci_dev *dev, int pos, + u32 clear, u32 set) +{ + return -EINVAL; +} #endif void cper_print_aer(struct pci_dev *dev, int aer_severity, @@ -70,5 +78,14 @@ void cper_print_aer(struct pci_dev *dev, int aer_severity, int cper_severity_to_aer(int cper_severity); void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn, int severity, struct aer_capability_regs *aer_regs); +static inline int pcie_aer_set_dword(struct pci_dev *dev, int pos, u32 set) +{ + return pcie_aer_clear_and_set_dword(dev, pos, 0, set); +} + +static inline int pcie_aer_clear_dword(struct pci_dev *dev, int pos, u32 clear) +{ + return pcie_aer_clear_and_set_dword(dev, pos, clear, 0); +} #endif //_AER_H_