diff mbox series

[RFC] Log PCIe service info with pci_dev, not pcie_device

Message ID 20190308180149.GD214730@google.com
State Not Applicable
Delegated to: Bjorn Helgaas
Headers show
Series [RFC] Log PCIe service info with pci_dev, not pcie_device | expand

Commit Message

Bjorn Helgaas March 8, 2019, 6:01 p.m. UTC
This is strictly a discussion starter, obviously not for application.

The portdrv driver binds to pci_dev for PCIe Root Ports and Switch
Ports.  It creates additional pcie_devices for each "service" (Power
Management events, AER, hotplug, Downstream Port Containment, etc).
These pcie_devices have their own struct device, in addition to the
one in the struct pci_dev.

Service drivers can then bind to those pcie_devices, and their
dev_printk output is typically associated with those, e.g.,

  pciehp 0000:80:10.0:pcie004: Slot #36 ...

The "pcie004" is a bitmask that identifies the particular service, but
I don't think it's very useful to users, especially since we already
have "pciehp" as the driver name.

I think the fact that pcie_device has its own struct device is
probably a design mistake and it would be better if those "services"
were more tightly integrated into the PCI core.

Changing that would be a big project that I don't want to tackle right
now, but I think a small step would be to simplify the dmesg logging
by doing it with the underlying pci_dev instead of the pcie_device.
For example, we could do something like the patch below, which would
change the dmesg output like this:

  - pciehp 0000:80:10.0:pcie004: Slot #36 AttnBtn- PwrCtrl- MRL- AttnInd+ PwrInd+ HotPlug+ Surprise+ Interlock- NoCompl- LLActRep+
  + pcieport 0000:80:10.0: pciehp: Slot #36 AttnBtn- PwrCtrl- MRL- AttnInd+ PwrInd+ HotPlug+ Surprise+ Interlock- NoCompl- LLActRep+

Please discuss :)

Comments

Keith Busch March 8, 2019, 6:24 p.m. UTC | #1
On Fri, Mar 08, 2019 at 12:01:49PM -0600, Bjorn Helgaas wrote:
> Changing that would be a big project that I don't want to tackle right
> now, but I think a small step would be to simplify the dmesg logging
> by doing it with the underlying pci_dev instead of the pcie_device.
> For example, we could do something like the patch below, which would
> change the dmesg output like this:
> 
>   - pciehp 0000:80:10.0:pcie004: Slot #36 AttnBtn- PwrCtrl- MRL- AttnInd+ PwrInd+ HotPlug+ Surprise+ Interlock- NoCompl- LLActRep+
>   + pcieport 0000:80:10.0: pciehp: Slot #36 AttnBtn- PwrCtrl- MRL- AttnInd+ PwrInd+ HotPlug+ Surprise+ Interlock- NoCompl- LLActRep+
 

Acked-by: Keith Busch <keith.busch@intel.com>
 
> diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
> index 7dd443aea5a5..2761778f2ecc 100644
> --- a/drivers/pci/hotplug/pciehp_hpc.c
> +++ b/drivers/pci/hotplug/pciehp_hpc.c
> @@ -868,7 +868,7 @@ struct controller *pcie_init(struct pcie_device *dev)
>  		PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_CC |
>  		PCI_EXP_SLTSTA_DLLSC | PCI_EXP_SLTSTA_PDC);
>  
> -	ctrl_info(ctrl, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interlock%c NoCompl%c LLActRep%c%s\n",
> +	pci_info(pdev, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interlock%c NoCompl%c LLActRep%c%s\n",
>  		(slot_cap & PCI_EXP_SLTCAP_PSN) >> 19,
>  		FLAG(slot_cap, PCI_EXP_SLTCAP_ABP),
>  		FLAG(slot_cap, PCI_EXP_SLTCAP_PCP),
Rafael J. Wysocki March 11, 2019, 9:50 a.m. UTC | #2
On Friday, March 8, 2019 7:01:49 PM CET Bjorn Helgaas wrote:
> This is strictly a discussion starter, obviously not for application.
> 
> The portdrv driver binds to pci_dev for PCIe Root Ports and Switch
> Ports.  It creates additional pcie_devices for each "service" (Power
> Management events, AER, hotplug, Downstream Port Containment, etc).
> These pcie_devices have their own struct device, in addition to the
> one in the struct pci_dev.
> 
> Service drivers can then bind to those pcie_devices, and their
> dev_printk output is typically associated with those, e.g.,
> 
>   pciehp 0000:80:10.0:pcie004: Slot #36 ...
> 
> The "pcie004" is a bitmask that identifies the particular service, but
> I don't think it's very useful to users, especially since we already
> have "pciehp" as the driver name.
> 
> I think the fact that pcie_device has its own struct device is
> probably a design mistake and it would be better if those "services"
> were more tightly integrated into the PCI core.
> 
> Changing that would be a big project that I don't want to tackle right
> now, but I think a small step would be to simplify the dmesg logging
> by doing it with the underlying pci_dev instead of the pcie_device.
> For example, we could do something like the patch below, which would
> change the dmesg output like this:
> 
>   - pciehp 0000:80:10.0:pcie004: Slot #36 AttnBtn- PwrCtrl- MRL- AttnInd+ PwrInd+ HotPlug+ Surprise+ Interlock- NoCompl- LLActRep+
>   + pcieport 0000:80:10.0: pciehp: Slot #36 AttnBtn- PwrCtrl- MRL- AttnInd+ PwrInd+ HotPlug+ Surprise+ Interlock- NoCompl- LLActRep+
> 
> Please discuss :)

No strong opinion here, and please feel free to add

Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

to this patch.

> diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
> index 7dd443aea5a5..2761778f2ecc 100644
> --- a/drivers/pci/hotplug/pciehp_hpc.c
> +++ b/drivers/pci/hotplug/pciehp_hpc.c
> @@ -868,7 +868,7 @@ struct controller *pcie_init(struct pcie_device *dev)
>  		PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_CC |
>  		PCI_EXP_SLTSTA_DLLSC | PCI_EXP_SLTSTA_PDC);
>  
> -	ctrl_info(ctrl, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interlock%c NoCompl%c LLActRep%c%s\n",
> +	pci_info(pdev, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interlock%c NoCompl%c LLActRep%c%s\n",
>  		(slot_cap & PCI_EXP_SLTCAP_PSN) >> 19,
>  		FLAG(slot_cap, PCI_EXP_SLTCAP_ABP),
>  		FLAG(slot_cap, PCI_EXP_SLTCAP_PCP),
>
diff mbox series

Patch

diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 7dd443aea5a5..2761778f2ecc 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -868,7 +868,7 @@  struct controller *pcie_init(struct pcie_device *dev)
 		PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_CC |
 		PCI_EXP_SLTSTA_DLLSC | PCI_EXP_SLTSTA_PDC);
 
-	ctrl_info(ctrl, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interlock%c NoCompl%c LLActRep%c%s\n",
+	pci_info(pdev, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interlock%c NoCompl%c LLActRep%c%s\n",
 		(slot_cap & PCI_EXP_SLTCAP_PSN) >> 19,
 		FLAG(slot_cap, PCI_EXP_SLTCAP_ABP),
 		FLAG(slot_cap, PCI_EXP_SLTCAP_PCP),