From patchwork Fri Sep 21 10:21:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 973110 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="nu3TGxlw"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42GqXp14Vkz9sCD for ; Fri, 21 Sep 2018 20:27:22 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390151AbeIUQND (ORCPT ); Fri, 21 Sep 2018 12:13:03 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:51460 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389684AbeIUQND (ORCPT ); Fri, 21 Sep 2018 12:13:03 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id w8LAOPt8033430; Fri, 21 Sep 2018 05:24:25 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1537525465; bh=7srJLFU2H5APGDHmyq9l+0rZG+OkuO025oUKh/xV4Ug=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=nu3TGxlwvzyx0/kTwPWT5AxpJh6sV+J2isg9XuGPciFnbOh16Bpzzuv0zdrx+is8N zGc2bIDfxCKPp6bPfGDYYnPZCtdHBYLaCxSgGICNRAzIO71fbL9MIG4eEXVuPGxtNY u1hIhqulWQPveX2YkxlH5zarRT/lNY398NLuVO2c= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w8LAOPkd031145; Fri, 21 Sep 2018 05:24:25 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Fri, 21 Sep 2018 05:24:25 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Fri, 21 Sep 2018 05:24:25 -0500 Received: from a0393678ub.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w8LAMEtV032280; Fri, 21 Sep 2018 05:24:21 -0500 From: Kishon Vijay Abraham I To: Jingoo Han , Joao Pinto , Bjorn Helgaas , Rob Herring , Lorenzo Pieralisi , Murali Karicheri , Kishon Vijay Abraham I , CC: Mark Rutland , Santosh Shilimkar , Tero Kristo , Nishanth Menon , , , , Subject: [RFC PATCH 27/40] dt-bindings: PCI: Document "atu" reg-names Date: Fri, 21 Sep 2018 15:51:42 +0530 Message-ID: <20180921102155.22839-28-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180921102155.22839-1-kishon@ti.com> References: <20180921102155.22839-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Document "atu" reg-names required to get the register space for ATU in Synopsys designware core version >= 4.80. Signed-off-by: Kishon Vijay Abraham I --- Documentation/devicetree/bindings/pci/designware-pcie.txt | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt index c124f9bc11f3..5561a1c060d0 100644 --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt @@ -4,8 +4,11 @@ Required properties: - compatible: "snps,dw-pcie" for RC mode; "snps,dw-pcie-ep" for EP mode; -- reg: Should contain the configuration address space. -- reg-names: Must be "config" for the PCIe configuration space. +- reg: For designware cores version < 4.80 contains the configuration + address space. For designware core version >= 4.80, contains + the configuration and ATU address space +- reg-names: Must be "config" for the PCIe configuration space and "atu" for + the ATU address space. (The old way of getting the configuration address space from "ranges" is deprecated and should be avoided.) - num-lanes: number of lanes to use