From patchwork Wed May 23 17:58:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajat Jain X-Patchwork-Id: 919260 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=google.com header.i=@google.com header.b="IHa4HCWq"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40rgKX0C7Sz9s0W for ; Thu, 24 May 2018 04:00:31 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933593AbeEWSAG (ORCPT ); Wed, 23 May 2018 14:00:06 -0400 Received: from mail-pl0-f65.google.com ([209.85.160.65]:37943 "EHLO mail-pl0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933824AbeEWR6p (ORCPT ); Wed, 23 May 2018 13:58:45 -0400 Received: by mail-pl0-f65.google.com with SMTP id c11-v6so13492505plr.5 for ; Wed, 23 May 2018 10:58:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lWXdoHBojoAI8FDQqlYl7uv53Q0VOOWpE8AirUaJNuQ=; b=IHa4HCWqrfieKuMrypmL0fdX4bbijJ6ye+H+Xs7F2gPhm1tUeRtJu3coXogyZYh0Qw 42Fw5NLePU0fym2fH8/FNINxif8sro2btXpydEAyJqh7XR/5AH3yaYZIeIfNHPdeOfFg o1/ytbLtqVhn8Az3jAkRztSvDtGMs7Go0yGajwXA2zh48t/ewenvxGlNrW/5/TnYRZQh xlpfow0IQ7dLU9DHWZ4pgQu1TRi0dvY9dqUUwny/3OudnmL1oJ12gZbNVf+wrUIr/zbp qxg3vhbNq135D+QEvs2oSoOtOI6me8ILzaW4tw67Pf2vReg1xAVzbI4v9398OzlgWc+Z 0FUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lWXdoHBojoAI8FDQqlYl7uv53Q0VOOWpE8AirUaJNuQ=; b=YJXjQ7Rwdn/vvXyDo/R7XVs/6V/EGmBte20qlzIFWsZGbnGZCguKDyHJwSisAk20Pp 66w2jdHLmgAfFN0ulQdfVYJ60nHiafuJKm9i8QO25K2M4IooMoHRm7mLzRSxbf60OHNK 0lmXQvGwaXKNyuxuFFWaHj1FuOM/Rfy2EVKcDVxEhALg4JLAM+i0QWFrD8Bx/ZQjm33W EKhoHYR1QxGU8U0pbYWs5AHcIyMZL7wjaNJKODsFpWw4XwrPd8e2flzZAOsjHf6eID6t su8AsYImffjjV0aQ4KWB62Bvmbb/HyfIyUhLLU0J13iGGpuZPfyu8X+LLN8l/XaHo+05 pz0w== X-Gm-Message-State: ALKqPwduyI1vCp1OKFr9nETdSfPP7P8p/25rQjI7KB5uykzPHjFkA/Pr dLgEjId/iXb32te1IdDxMRlwQQ== X-Google-Smtp-Source: AB8JxZqmLCzaE9qEmZUGJ4IcHZ+nc0wz+HNHxV2sLKECMziWAvKR6ogmgEovjoJ1HxU17DKaUUFSBA== X-Received: by 2002:a17:902:b58e:: with SMTP id a14-v6mr3933781pls.261.1527098324771; Wed, 23 May 2018 10:58:44 -0700 (PDT) Received: from rajat.mtv.corp.google.com ([2620:0:1000:1501:dc81:9a9e:fdee:decf]) by smtp.gmail.com with ESMTPSA id k186-v6sm41433025pfc.142.2018.05.23.10.58.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 23 May 2018 10:58:44 -0700 (PDT) From: Rajat Jain To: Bjorn Helgaas , Jonathan Corbet , Philippe Ombredanne , Kate Stewart , Thomas Gleixner , Greg Kroah-Hartman , Rajat Jain , Frederick Lawler , Oza Pawandeep , Keith Busch , Gabriele Paoloni , Alexandru Gagniuc , Thomas Tai , "Steven Rostedt (VMware)" , linux-pci@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Jes Sorensen , Kyle McMartin Cc: rajatxjain@gmail.com Subject: [PATCH v2 1/5] PCI/AER: Define and allocate aer_stats structure for AER capable devices Date: Wed, 23 May 2018 10:58:04 -0700 Message-Id: <20180523175808.28030-2-rajatja@google.com> X-Mailer: git-send-email 2.17.0.441.gb46fe60e1d-goog In-Reply-To: <20180523175808.28030-1-rajatja@google.com> References: <20180522222805.80314-1-rajatja@google.com> <20180523175808.28030-1-rajatja@google.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Define a structure to hold the AER statistics. There are 2 groups of statistics: dev_* counters that are to be collected for all AER capable devices and rootport_* counters that are collected for all (AER capable) rootports only. Allocate and free this structure when device is added or released (thus counters survive the lifetime of the device). Add a new file aerdrv_stats.c to hold the AER stats collection logic. Signed-off-by: Rajat Jain --- v2: Fix the license header as per Greg's suggestions (Since there is disagreement with using "//" vs "/* */" for license I decided to keep the one preferred by Linus, also used by others in this directory) drivers/pci/pcie/aer/Makefile | 2 +- drivers/pci/pcie/aer/aerdrv.h | 6 +++ drivers/pci/pcie/aer/aerdrv_core.c | 9 +++++ drivers/pci/pcie/aer/aerdrv_stats.c | 61 +++++++++++++++++++++++++++++ drivers/pci/probe.c | 1 + include/linux/pci.h | 3 ++ 6 files changed, 81 insertions(+), 1 deletion(-) create mode 100644 drivers/pci/pcie/aer/aerdrv_stats.c diff --git a/drivers/pci/pcie/aer/Makefile b/drivers/pci/pcie/aer/Makefile index 09bd890875a3..a06f9cc2bde5 100644 --- a/drivers/pci/pcie/aer/Makefile +++ b/drivers/pci/pcie/aer/Makefile @@ -7,7 +7,7 @@ obj-$(CONFIG_PCIEAER) += aerdriver.o obj-$(CONFIG_PCIE_ECRC) += ecrc.o -aerdriver-objs := aerdrv_errprint.o aerdrv_core.o aerdrv.o +aerdriver-objs := aerdrv_errprint.o aerdrv_core.o aerdrv.o aerdrv_stats.o aerdriver-$(CONFIG_ACPI) += aerdrv_acpi.o obj-$(CONFIG_PCIEAER_INJECT) += aer_inject.o diff --git a/drivers/pci/pcie/aer/aerdrv.h b/drivers/pci/pcie/aer/aerdrv.h index b4c950683cc7..d8b9fba536ed 100644 --- a/drivers/pci/pcie/aer/aerdrv.h +++ b/drivers/pci/pcie/aer/aerdrv.h @@ -33,6 +33,10 @@ PCI_ERR_UNC_MALF_TLP) #define AER_MAX_MULTI_ERR_DEVICES 5 /* Not likely to have more */ + +#define AER_MAX_TYPEOF_CORRECTABLE_ERRS 16 /* as per PCI_ERR_COR_STATUS */ +#define AER_MAX_TYPEOF_UNCORRECTABLE_ERRS 26 /* as per PCI_ERR_UNCOR_STATUS*/ + struct aer_err_info { struct pci_dev *dev[AER_MAX_MULTI_ERR_DEVICES]; int error_dev_num; @@ -81,6 +85,8 @@ void aer_isr(struct work_struct *work); void aer_print_error(struct pci_dev *dev, struct aer_err_info *info); void aer_print_port_info(struct pci_dev *dev, struct aer_err_info *info); irqreturn_t aer_irq(int irq, void *context); +int pci_aer_stats_init(struct pci_dev *pdev); +void pci_aer_stats_exit(struct pci_dev *pdev); #ifdef CONFIG_ACPI_APEI int pcie_aer_get_firmware_first(struct pci_dev *pci_dev); diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c index 36e622d35c48..42a6f913069a 100644 --- a/drivers/pci/pcie/aer/aerdrv_core.c +++ b/drivers/pci/pcie/aer/aerdrv_core.c @@ -95,9 +95,18 @@ int pci_cleanup_aer_error_status_regs(struct pci_dev *dev) int pci_aer_init(struct pci_dev *dev) { dev->aer_cap = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); + + if (!dev->aer_cap || pci_aer_stats_init(dev)) + return -EIO; + return pci_cleanup_aer_error_status_regs(dev); } +void pci_aer_exit(struct pci_dev *dev) +{ + pci_aer_stats_exit(dev); +} + /** * add_error_device - list device to be handled * @e_info: pointer to error info diff --git a/drivers/pci/pcie/aer/aerdrv_stats.c b/drivers/pci/pcie/aer/aerdrv_stats.c new file mode 100644 index 000000000000..2f48d6bc81f1 --- /dev/null +++ b/drivers/pci/pcie/aer/aerdrv_stats.c @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018 Google Inc, All Rights Reserved. + * + * Rajat Jain (rajatja@google.com) + * + * AER Statistics - exposed to userspace via /sysfs attributes. + */ + +#include +#include "aerdrv.h" + +/* AER stats for the device */ +struct aer_stats { + + /* + * Fields for all AER capable devices. They indicate the errors + * "as seen by this device". Note that this may mean that if an + * end point is causing problems, the AER counters may increment + * at its link partner (e.g. root port) because the errors will be + * "seen" by the link partner and not the the problematic end point + * itself (which may report all counters as 0 as it never saw any + * problems). + */ + /* Individual counters for different type of correctable errors */ + u64 dev_cor_errs[AER_MAX_TYPEOF_CORRECTABLE_ERRS]; + /* Individual counters for different type of uncorrectable errors */ + u64 dev_uncor_errs[AER_MAX_TYPEOF_UNCORRECTABLE_ERRS]; + /* Total number of correctable errors seen by this device */ + u64 dev_total_cor_errs; + /* Total number of fatal uncorrectable errors seen by this device */ + u64 dev_total_fatal_errs; + /* Total number of fatal uncorrectable errors seen by this device */ + u64 dev_total_nonfatal_errs; + + /* + * Fields for Root ports only, these indicate the total number of + * ERR_COR, ERR_FATAL, and ERR_NONFATAL messages received by the + * rootport, INCLUDING the ones that are generated internally (by + * the rootport itself) + */ + u64 rootport_total_cor_errs; + u64 rootport_total_fatal_errs; + u64 rootport_total_nonfatal_errs; +}; + +int pci_aer_stats_init(struct pci_dev *pdev) +{ + pdev->aer_stats = kzalloc(sizeof(struct aer_stats), GFP_KERNEL); + if (!pdev->aer_stats) { + dev_err(&pdev->dev, "No memory for aer_stats\n"); + return -ENOMEM; + } + return 0; +} + +void pci_aer_stats_exit(struct pci_dev *pdev) +{ + kfree(pdev->aer_stats); + pdev->aer_stats = NULL; +} diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 384020757b81..dd662c241373 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -2064,6 +2064,7 @@ static void pci_configure_device(struct pci_dev *dev) static void pci_release_capabilities(struct pci_dev *dev) { + pci_aer_exit(dev); pci_vpd_release(dev); pci_iov_release(dev); pci_free_cap_save_buffers(dev); diff --git a/include/linux/pci.h b/include/linux/pci.h index 21965e0dbe62..5c84b1304de7 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -299,6 +299,7 @@ struct pci_dev { u8 hdr_type; /* PCI header type (`multi' flag masked out) */ #ifdef CONFIG_PCIEAER u16 aer_cap; /* AER capability offset */ + struct aer_stats *aer_stats; /* AER stats for this device */ #endif u8 pcie_cap; /* PCIe capability offset */ u8 msi_cap; /* MSI capability offset */ @@ -1470,10 +1471,12 @@ static inline bool pcie_aspm_support_enabled(void) { return false; } void pci_no_aer(void); bool pci_aer_available(void); int pci_aer_init(struct pci_dev *dev); +void pci_aer_exit(struct pci_dev *dev); #else static inline void pci_no_aer(void) { } static inline bool pci_aer_available(void) { return false; } static inline int pci_aer_init(struct pci_dev *d) { return -ENODEV; } +static inline void pci_aer_exit(struct pci_dev *d) { } #endif #ifdef CONFIG_PCIE_ECRC