From patchwork Mon Aug 28 14:23:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 806602 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xgvBZ3xjyz9sMN for ; Tue, 29 Aug 2017 00:23:18 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751470AbdH1OXP (ORCPT ); Mon, 28 Aug 2017 10:23:15 -0400 Received: from metis.ext.4.pengutronix.de ([92.198.50.35]:36777 "EHLO metis.ext.4.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751302AbdH1OXM (ORCPT ); Mon, 28 Aug 2017 10:23:12 -0400 Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7] helo=dude.pengutronix.de.) by metis.ext.pengutronix.de with esmtp (Exim 4.84_2) (envelope-from ) id 1dmKwX-0005gz-9c; Mon, 28 Aug 2017 16:23:09 +0200 From: Lucas Stach To: Bjorn Helgaas , Tim Harvey , Jingoo Han , Joao Pinto , Shawn Guo Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, patchwork-lst@pengutronix.de, kernel@pengutronix.de Subject: [PATCH 1/3] PCI: designware: only register MSI controller when MSI irq line is valid Date: Mon, 28 Aug 2017 16:23:05 +0200 Message-Id: <20170828142307.30061-2-l.stach@pengutronix.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170828142307.30061-1-l.stach@pengutronix.de> References: <20170828142307.30061-1-l.stach@pengutronix.de> X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-pci@vger.kernel.org Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The MSI part of the controller isn't essential, so the host controller can be registered without the MSI controller being present. This allows the host to work in PCIe legancy interrupt only mode, if the IRQ line for the MSI controller is missing. Signed-off-by: Lucas Stach --- drivers/pci/dwc/pcie-designware-host.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c index d29c020da082..8494089f088d 100644 --- a/drivers/pci/dwc/pcie-designware-host.c +++ b/drivers/pci/dwc/pcie-designware-host.c @@ -381,7 +381,7 @@ int dw_pcie_host_init(struct pcie_port *pp) if (ret) pci->num_viewport = 2; - if (IS_ENABLED(CONFIG_PCI_MSI)) { + if (IS_ENABLED(CONFIG_PCI_MSI) && pp->msi_irq > 0) { if (!pp->ops->msi_host_init) { pp->irq_domain = irq_domain_add_linear(dev->of_node, MAX_MSI_IRQS, &msi_domain_ops, @@ -412,7 +412,7 @@ int dw_pcie_host_init(struct pcie_port *pp) bridge->ops = &dw_pcie_ops; bridge->map_irq = of_irq_parse_and_map_pci; bridge->swizzle_irq = pci_common_swizzle; - if (IS_ENABLED(CONFIG_PCI_MSI)) { + if (IS_ENABLED(CONFIG_PCI_MSI) && pp->msi_irq > 0) { bridge->msi = &dw_pcie_msi_chip; dw_pcie_msi_chip.dev = dev; }