From patchwork Thu Jun 8 14:13:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Pieralisi X-Patchwork-Id: 773296 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3wk6sL1ZJzz9s76 for ; Fri, 9 Jun 2017 00:15:50 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751709AbdFHOPs (ORCPT ); Thu, 8 Jun 2017 10:15:48 -0400 Received: from foss.arm.com ([217.140.101.70]:51728 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751576AbdFHOPs (ORCPT ); Thu, 8 Jun 2017 10:15:48 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DE7A71682; Thu, 8 Jun 2017 07:15:47 -0700 (PDT) Received: from red-moon.cambridge.arm.com (red-moon.cambridge.arm.com [10.1.206.55]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 846433F3E1; Thu, 8 Jun 2017 07:15:43 -0700 (PDT) From: Lorenzo Pieralisi To: linux-pci@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Lorenzo Pieralisi , Bjorn Helgaas , Bharat Kumar Gogada , Arnd Bergmann , Will Deacon , Russell King , Pratyush Anand , Jingoo Han , Rob Herring , Simon Horman , Mingkai Hu , Tanmay Inamdar , Murali Karicheri , Wenrui Li , Shawn Lin , Minghuan Lian , Gabriele Paoloni , Thomas Petazzoni , Joao Pinto , Thierry Reding , Michal Simek , Stanimir Varbanov , Zhou Wang , Roy Zang , Matthew Minter , Linus Walleij Subject: [RFT PATCH v2 41/42] PCI: xilinx-nwl: Move to struct pci_host_bridge IRQ mapping functions Date: Thu, 8 Jun 2017 15:13:41 +0100 Message-Id: <20170608141342.2018-42-lorenzo.pieralisi@arm.com> X-Mailer: git-send-email 2.10.0 In-Reply-To: <20170608141342.2018-1-lorenzo.pieralisi@arm.com> References: <20170608141342.2018-1-lorenzo.pieralisi@arm.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org struct pci_host_bridge gained hooks to map/swizzle IRQs, so that the IRQ mapping can be done automatically by PCI core code through the pci_assign_irq() function instead of resorting to per-arch specific implementation callbacks to carry out the same task which force PCI host bridge drivers implementation to implement per-arch kludges to carry out a task that is inherently architecture agnostic. Add map/swizzle IRQs hooks to the xilinx-nwl PCI host driver to move the IRQ allocation into core code and stop relying on arch specific callbacks. Signed-off-by: Lorenzo Pieralisi Cc: Bjorn Helgaas Cc: Bharat Kumar Gogada --- drivers/pci/host/pcie-xilinx-nwl.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/host/pcie-xilinx-nwl.c b/drivers/pci/host/pcie-xilinx-nwl.c index e8a5894..d1f7e4c 100644 --- a/drivers/pci/host/pcie-xilinx-nwl.c +++ b/drivers/pci/host/pcie-xilinx-nwl.c @@ -838,6 +838,8 @@ static int nwl_pcie_probe(struct platform_device *pdev) bridge->sysdata = pcie; bridge->busnr = pcie->root_busno; bridge->ops = &nwl_pcie_ops; + bridge->map_irq = of_irq_parse_and_map_pci; + bridge->swizzle_irq = pci_common_swizzle; if (IS_ENABLED(CONFIG_PCI_MSI)) { err = nwl_pcie_enable_msi(pcie);