From patchwork Wed Feb 5 06:53:15 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 316816 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3CE162C0099 for ; Wed, 5 Feb 2014 17:53:24 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932306AbaBEGwY (ORCPT ); Wed, 5 Feb 2014 01:52:24 -0500 Received: from mail-pb0-f42.google.com ([209.85.160.42]:63137 "EHLO mail-pb0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932242AbaBEGwF (ORCPT ); Wed, 5 Feb 2014 01:52:05 -0500 Received: by mail-pb0-f42.google.com with SMTP id jt11so9589746pbb.29 for ; Tue, 04 Feb 2014 22:52:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=OPjsm/YGZY9uKB0U+95apfnQoxyV6Lbk1vTqiYkXNtU=; b=S/ihcp3F+5ckO7nrQPBS/YNfWnbnn7yZ1YxjGaoscSE6pZEUs7lgqovFuHIBGMfEfE QF+NyLb/Ghoq5+Oj/MntKEtC3F/CvhCDoRXzN3eAnI32vI7pyCCZRlxkoJchF7rHD34y MKvETRDms65PNa/N8tbi/AzUPXDbNfftYkhX9r7w7U5zcjsgYntckbGnkXFoYPPGdwhv V7x48cmfsDXJED6COXNsc8pFn7Yyszd66u46UXJXlURJxs1J06XtgYEpY2zM21aJGLuK rKzz4oda3J/G9TL2aXto8OyEEDwSwutLG6t0lrdCqoq5c1UoqBQRcAHmgosVWhbKUnSV 5emw== X-Received: by 10.66.240.4 with SMTP id vw4mr48733600pac.26.1391583124833; Tue, 04 Feb 2014 22:52:04 -0800 (PST) Received: from [127.0.0.1] (s214090.ppp.asahi-net.or.jp. [220.157.214.90]) by mx.google.com with ESMTPSA id rb6sm37342807pbb.41.2014.02.04.22.52.01 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 04 Feb 2014 22:52:03 -0800 (PST) From: Magnus Damm To: linux-pci@vger.kernel.org Cc: linux-sh@vger.kernel.org, linux-kernel@vger.kernel.org, valentine.barshak@cogentembedded.com, horms@verge.net.au, bhelgaas@google.com, Magnus Damm , ben.dooks@codethink.co.uk Date: Wed, 05 Feb 2014 15:53:15 +0900 Message-Id: <20140205065315.29445.65734.sendpatchset@w520> In-Reply-To: <20140205065243.29445.76593.sendpatchset@w520> References: <20140205065243.29445.76593.sendpatchset@w520> Subject: [PATCH 02/04] PCI: rcar: Break out window size handling Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Magnus Damm Break out the hard coded window size code to allow dynamic setup. The window size is still left at 1GiB but with this patch changing window size is easy for testing. Signed-off-by: Magnus Damm --- drivers/pci/host/pci-rcar-gen2.c | 31 ++++++++++++++++++++++++++++--- 1 file changed, 28 insertions(+), 3 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- 0005/drivers/pci/host/pci-rcar-gen2.c +++ work/drivers/pci/host/pci-rcar-gen2.c 2014-02-04 17:22:41.000000000 +0900 @@ -18,6 +18,7 @@ #include #include #include +#include #include /* AHB-PCI Bridge PCI communication registers */ @@ -81,6 +82,7 @@ struct rcar_pci_priv { struct resource mem_res; struct resource *cfg_res; int irq; + unsigned long window_size; }; /* PCI configuration space operations */ @@ -180,10 +182,31 @@ static int __init rcar_pci_setup(int nr, iowrite32(val, reg + RCAR_USBCTR_REG); udelay(4); - /* De-assert reset and set PCIAHB window1 size to 1GB */ + /* De-assert reset and reset PCIAHB window1 size */ val &= ~(RCAR_USBCTR_PCIAHB_WIN1_MASK | RCAR_USBCTR_PCICLK_MASK | RCAR_USBCTR_USBH_RST | RCAR_USBCTR_PLL_RST); - iowrite32(val | RCAR_USBCTR_PCIAHB_WIN1_1G, reg + RCAR_USBCTR_REG); + + /* Setup PCIAHB window1 size */ + switch (priv->window_size) { + case SZ_2G: + val |= RCAR_USBCTR_PCIAHB_WIN1_2G; + break; + case SZ_1G: + val |= RCAR_USBCTR_PCIAHB_WIN1_1G; + break; + case SZ_512M: + val |= RCAR_USBCTR_PCIAHB_WIN1_512M; + break; + default: + pr_warn("unknown window size %ld - defaulting to 256M\n", + priv->window_size); + priv->window_size = SZ_256M; + /* fall-through */ + case SZ_256M: + val |= RCAR_USBCTR_PCIAHB_WIN1_256M; + break; + } + iowrite32(val, reg + RCAR_USBCTR_REG); /* Configure AHB master and slave modes */ iowrite32(RCAR_AHB_BUS_MODE, reg + RCAR_AHB_BUS_CTR_REG); @@ -194,7 +217,7 @@ static int __init rcar_pci_setup(int nr, RCAR_PCI_ARBITER_PCIBP_MODE; iowrite32(val, reg + RCAR_PCI_ARBITER_CTR_REG); - /* PCI-AHB mapping: 0x40000000-0x80000000 */ + /* PCI-AHB mapping: 0x40000000 base */ iowrite32(0x40000000 | RCAR_PCIAHB_PREFETCH16, reg + RCAR_PCIAHB_WIN1_CTR_REG); @@ -271,6 +294,8 @@ static int rcar_pci_probe(struct platfor priv->reg = reg; priv->dev = &pdev->dev; + priv->window_size = SZ_1G; + memset(&hw, 0, sizeof(hw)); hw.nr_controllers = 1; hw.private_data = (void **)&priv;