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Wed, 02 Aug 2023 04:59:31 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 3724xRqx022304; Wed, 2 Aug 2023 04:59:27 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3s4uukd91v-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Wed, 02 Aug 2023 04:59:27 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3724xQ8d022284; Wed, 2 Aug 2023 04:59:26 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-krichai-hyd.qualcomm.com [10.213.110.112]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 3724xQ7m022278; Wed, 02 Aug 2023 04:59:26 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 4058933) id 995824B5C; Wed, 2 Aug 2023 10:29:25 +0530 (+0530) From: Krishna chaitanya chundru To: manivannan.sadhasivam@linaro.org Cc: helgaas@kernel.org, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_vbadigan@quicinc.com, quic_nitegupt@quicinc.com, quic_skananth@quicinc.com, quic_ramkri@quicinc.com, quic_parass@quicinc.com, krzysztof.kozlowski@linaro.org, Krishna chaitanya chundru , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Manivannan Sadhasivam , Kishon Vijay Abraham I , Bjorn Helgaas , Jonathan Corbet , linux-doc@vger.kernel.org (open list:DOCUMENTATION) Subject: [PATCH v5 1/5] PCI: endpoint: Add wakeup host API to EPC core Date: Wed, 2 Aug 2023 10:29:15 +0530 Message-Id: <1690952359-8625-2-git-send-email-quic_krichai@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1690952359-8625-1-git-send-email-quic_krichai@quicinc.com> References: <1690952359-8625-1-git-send-email-quic_krichai@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: -oe8HkYHvvYprXsKrtAHYdzt16vWDF_j X-Proofpoint-GUID: -oe8HkYHvvYprXsKrtAHYdzt16vWDF_j X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-02_02,2023-08-01_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 adultscore=0 priorityscore=1501 malwarescore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=795 phishscore=0 lowpriorityscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2308020044 X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Endpoint cannot send any data/MSI when the D-state is in D3cold or D3hot. Endpoint needs to wake up the host to bring the D-state to D0. Endpoint can toggle wake signal when the D-state is in D3cold and vaux is not supplied or can send inband PME. To support this add wakeup_host() callback to the EPC core. Signed-off-by: Krishna chaitanya chundru --- Documentation/PCI/endpoint/pci-endpoint.rst | 6 ++++++ drivers/pci/endpoint/pci-epc-core.c | 30 +++++++++++++++++++++++++++++ include/linux/pci-epc.h | 5 +++++ 3 files changed, 41 insertions(+) diff --git a/Documentation/PCI/endpoint/pci-endpoint.rst b/Documentation/PCI/endpoint/pci-endpoint.rst index 66f3191..9a96ce0 100644 --- a/Documentation/PCI/endpoint/pci-endpoint.rst +++ b/Documentation/PCI/endpoint/pci-endpoint.rst @@ -53,6 +53,7 @@ by the PCI controller driver. * raise_irq: ops to raise a legacy, MSI or MSI-X interrupt * start: ops to start the PCI link * stop: ops to stop the PCI link + * wakeup_host: ops to wakeup host The PCI controller driver can then create a new EPC device by invoking devm_pci_epc_create()/pci_epc_create(). @@ -121,6 +122,11 @@ by the PCI endpoint function driver. The PCI endpoint function driver should use pci_epc_mem_free_addr() to free the memory space allocated using pci_epc_mem_alloc_addr(). +* pci_epc_wakeup_host() + + The PCI endpoint function driver should use pci_epc_wakeup_host() to wakeup + host. + Other EPC APIs ~~~~~~~~~~~~~~ diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index 4cf9c82..afd6a25 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -167,6 +167,36 @@ const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc, EXPORT_SYMBOL_GPL(pci_epc_get_features); /** + * pci_epc_wakeup_host() - Wakeup the host + * @epc: the EPC device which has to wakeup the host + * @func_no: the physical endpoint function number in the EPC device + * @vfunc_no: the virtual endpoint function number in the physical function + * @send_pme: true if wakeup is by sending PME + * + * Invoke to wakeup host + */ +bool pci_epc_wakeup_host(struct pci_epc *epc, u8 func_no, u8 vfunc_no, bool send_pme) +{ + int ret; + + if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) + return false; + + if (vfunc_no > 0 && (!epc->max_vfs || vfunc_no > epc->max_vfs[func_no])) + return false; + + if (!epc->ops->wakeup_host) + return true; + + mutex_lock(&epc->lock); + ret = epc->ops->wakeup_host(epc, func_no, vfunc_no, send_pme); + mutex_unlock(&epc->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(pci_epc_wakeup_host); + +/** * pci_epc_stop() - stop the PCI link * @epc: the link of the EPC device that has to be stopped * diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 26a1108..166a86b 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -59,6 +59,7 @@ pci_epc_interface_string(enum pci_epc_interface_type type) * @start: ops to start the PCI link * @stop: ops to stop the PCI link * @get_features: ops to get the features supported by the EPC + * @wakeup_host: ops to wakeup the host * @owner: the module owner containing the ops */ struct pci_epc_ops { @@ -88,6 +89,8 @@ struct pci_epc_ops { void (*stop)(struct pci_epc *epc); const struct pci_epc_features* (*get_features)(struct pci_epc *epc, u8 func_no, u8 vfunc_no); + bool (*wakeup_host)(struct pci_epc *epc, u8 func_no, u8 vfunc_no, + bool send_pme); struct module *owner; }; @@ -234,6 +237,8 @@ int pci_epc_start(struct pci_epc *epc); void pci_epc_stop(struct pci_epc *epc); const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc, u8 func_no, u8 vfunc_no); +bool pci_epc_wakeup_host(struct pci_epc *epc, u8 func_no, u8 vfunc_no, + bool send_pme); enum pci_barno pci_epc_get_first_free_bar(const struct pci_epc_features *epc_features); enum pci_barno pci_epc_get_next_free_bar(const struct pci_epc_features