From patchwork Thu Jun 23 02:09:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 1646866 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4LT3bN1NMGz9sGT for ; Thu, 23 Jun 2022 12:09:20 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377666AbiFWCJR (ORCPT ); Wed, 22 Jun 2022 22:09:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377594AbiFWCJQ (ORCPT ); Wed, 22 Jun 2022 22:09:16 -0400 Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 7D8091F2E0; Wed, 22 Jun 2022 19:09:15 -0700 (PDT) Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 23 Jun 2022 11:09:15 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id E782A2058B4F; Thu, 23 Jun 2022 11:09:14 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Thu, 23 Jun 2022 11:09:14 +0900 Received: from plum.e01.socionext.com (unknown [10.212.243.119]) by kinkan2.css.socionext.com (Postfix) with ESMTP id A064FB62E2; Thu, 23 Jun 2022 11:09:14 +0900 (JST) From: Kunihiko Hayashi To: Jingoo Han , Gustavo Pimentel , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski Cc: Masami Hiramatsu , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kunihiko Hayashi Subject: [PATCH v4 1/2] dt-bindings: PCI: designware-ep: Increase maxItems of reg and reg-names Date: Thu, 23 Jun 2022 11:09:01 +0900 Message-Id: <1655950142-2026-2-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1655950142-2026-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1655950142-2026-1-git-send-email-hayashi.kunihiko@socionext.com> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org UniPhier PCIe EP controller has up to 5 register mappings (dbi, dbi2, link, addr_space and atu), so maxItems of "reg" and "reg-names" should allow 5. Signed-off-by: Kunihiko Hayashi Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml index b78535040f04..f9390d729958 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml @@ -28,11 +28,11 @@ properties: versions. For designware core version >= 4.80, it may contain ATU address space. minItems: 2 - maxItems: 4 + maxItems: 5 reg-names: minItems: 2 - maxItems: 4 + maxItems: 5 items: enum: [dbi, dbi2, config, atu, addr_space, link, atu_dma, appl]